From: Andrew Burgess <andrew.burgess@embecosm.com>
To: Jim Wilson <jimw@sifive.com>
Cc: Binutils <binutils@sourceware.org>,
gdb-patches@sourceware.org, Nelson Chu <nelson.chu@sifive.com>,
John Baldwin <jhb@freebsd.org>
Subject: Re: [PATCH 6/8] bfd/binutils: add support for RISC-V CSRs in core files
Date: Mon, 7 Dec 2020 15:19:32 +0000 [thread overview]
Message-ID: <20201207151932.GL2729@embecosm.com> (raw)
In-Reply-To: <CAFyWVabOru5Ow1z1fVer6Aty2P4n2uWvWHVjwHobQhzRaMXHdw@mail.gmail.com>
* Jim Wilson <jimw@sifive.com> [2020-12-02 15:50:58 -0800]:
> On Wed, Dec 2, 2020 at 9:39 AM Andrew Burgess <andrew.burgess@embecosm.com>
> wrote:
>
> > diff --git a/include/elf/common.h b/include/elf/common.h
> > index 1dbf0b11983..54d5d989a39 100644
> > --- a/include/elf/common.h
> > +++ b/include/elf/common.h
> > @@ -663,6 +663,8 @@
> > /* note name must be "LINUX". */
> > #define NT_ARC_V2 0x600 /* ARC HS accumulator/extra
> > registers. */
> > /* note name must be "LINUX". */
> > +#define NT_RISCV_CSR 0x501 /* RISC-V Control and Status
> > Registers */
> > + /* note name must be "CORE". */
> > #define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */
> > #define NT_FILE 0x46494c45 /* Description of mapped
> > files. */
> >
>
> Odd that the 0x5XX numbering was skipped for ARC, though I don't see any
> reason for it, so it appears OK to use for RISC-V. I would suggest keeping
> them in numerical order to make the file easier to read, so if you want to
> use 0x501 put it before the ARC entry.
I've reordered the lines in my current patch tree as you suggest.
Thanks,
Andrew
next prev parent reply other threads:[~2020-12-07 15:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 17:39 [PATCH 0/8] Bare-metal core dumps for RISC-V Andrew Burgess
2020-12-02 17:39 ` [PATCH 1/8] gdb/riscv: use a single regset supply function for riscv fbsd & linux Andrew Burgess
2021-01-18 14:15 ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 2/8] bfd/binutils: support for gdb target descriptions in the core file Andrew Burgess
2020-12-02 18:21 ` Luis Machado
2020-12-02 22:58 ` Jim Wilson
2020-12-03 12:16 ` Luis Machado
[not found] ` <20201214115512.GI2945@embecosm.com>
2021-01-11 10:19 ` Andrew Burgess
2021-01-11 13:03 ` Luis Machado
2020-12-07 12:48 ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 3/8] gdb: write target description into " Andrew Burgess
2020-12-03 20:36 ` Tom Tromey
2020-12-07 14:38 ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 4/8] bfd/riscv: prepare to handle bare metal core dump creation Andrew Burgess
2020-12-02 23:24 ` Jim Wilson
2020-12-07 14:39 ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 5/8] gdb/riscv: introduce bare metal core dump support Andrew Burgess
2020-12-02 18:12 ` Luis Machado
2020-12-07 15:17 ` Andrew Burgess
2020-12-07 15:58 ` Luis Machado
2020-12-07 16:58 ` Andrew Burgess
2020-12-07 17:24 ` Luis Machado
2020-12-07 18:11 ` Andrew Burgess
2020-12-07 19:00 ` Luis Machado
2020-12-07 19:23 ` Andrew Burgess
2020-12-07 19:39 ` Luis Machado
2020-12-07 19:51 ` Paul Mathieu
2020-12-13 10:13 ` Fredrik Hederstierna
2020-12-02 17:39 ` [PATCH 6/8] bfd/binutils: add support for RISC-V CSRs in core files Andrew Burgess
2020-12-02 23:50 ` Jim Wilson
2020-12-07 15:19 ` Andrew Burgess [this message]
2020-12-14 13:37 ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 7/8] gdb/riscv: make riscv target description names global Andrew Burgess
2020-12-02 17:39 ` [PATCH 8/8] gdb/riscv: write CSRs into baremetal core dumps Andrew Burgess
2020-12-02 23:59 ` [PATCH 0/8] Bare-metal core dumps for RISC-V Jim Wilson
2020-12-07 12:10 ` Andrew Burgess
2020-12-07 19:57 ` Jim Wilson
2020-12-03 20:40 ` Tom Tromey
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