[PATCH] Aarch64 sim fix for gcc-10 miscompilation.

[PATCH] Aarch64 sim fix for gcc-10 miscompilation.

[Jim Wilson]

This fixes a problem that occurs when compiled by gcc-10, as the code
is relying on undefined overflow behavior.  This is fixed by replacing
compares between 32-bit and 64-bit results with compares that just use
the 64-bit results with a cast.

Tested with the simulator make check and a gcc make check.  There were no
regressions.

Committed.

	PR sim/27483
	* simulator.c (set_flags_for_add32): Compare uresult against
	itself.  Compare sresult against itself.
---
 sim/aarch64/simulator.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index 6ba29a0ed57..e0b428d26d9 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -1650,10 +1650,10 @@ set_flags_for_add32 (sim_cpu *cpu, int32_t value1, int32_t value2)
   if (result & (1 << 31))
     flags |= N;
 
-  if (uresult != (uint32_t)result)
+  if (uresult != (uint32_t)uresult)
     flags |= C;
 
-  if (sresult != result)
+  if (sresult != (int32_t)sresult)
     flags |= V;
 
   aarch64_set_CPSR (cpu, flags);
-- 
2.17.1

Re: [PATCH] Aarch64 sim fix for gcc-10 miscompilation.

[Andrew Burgess]

* Jim Wilson <jimw@sifive.com> [2021-04-07 18:54:03 -0700]:

> This fixes a problem that occurs when compiled by gcc-10, as the code
> is relying on undefined overflow behavior.  This is fixed by replacing
> compares between 32-bit and 64-bit results with compares that just use
> the 64-bit results with a cast.
> 
> Tested with the simulator make check and a gcc make check.  There were no
> regressions.
> 
> Committed.
> 
> 	PR sim/27483
> 	* simulator.c (set_flags_for_add32): Compare uresult against
> 	itself.  Compare sresult against itself.

LGTM.

Thanks,
Andrew


> ---
>  sim/aarch64/simulator.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
> index 6ba29a0ed57..e0b428d26d9 100644
> --- a/sim/aarch64/simulator.c
> +++ b/sim/aarch64/simulator.c
> @@ -1650,10 +1650,10 @@ set_flags_for_add32 (sim_cpu *cpu, int32_t value1, int32_t value2)
>    if (result & (1 << 31))
>      flags |= N;
>  
> -  if (uresult != (uint32_t)result)
> +  if (uresult != (uint32_t)uresult)
>      flags |= C;
>  
> -  if (sresult != result)
> +  if (sresult != (int32_t)sresult)
>      flags |= V;
>  
>    aarch64_set_CPSR (cpu, flags);
> -- 
> 2.17.1
>