From: Tom Tromey <tom@tromey.com>
To: gdb-patches@sourceware.org
Cc: Tom Tromey <tom@tromey.com>
Subject: [PATCH 2/2] Add system includes in sim
Date: Thu, 8 Apr 2021 10:44:36 -0600 [thread overview]
Message-ID: <20210408164436.2165323-3-tom@tromey.com> (raw)
In-Reply-To: <20210408164436.2165323-1-tom@tromey.com>
This updates various parts of the sim to include missing system
headers. I made the includes unconditional, because other parts of
the tree are already doing this.
sim/cris/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* traps.c: Include stdlib.h.
* cris-tmpl.c: Include stdlib.h.
sim/erc32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* func.c: Include sys/time.h.
sim/frv/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* traps.c: Include stdlib.h.
* registers.c: Include stdlib.h.
* profile.c: Include stdlib.h.
* memory.c: Include stdlib.h.
* interrupts.c: Include stdlib.h.
* frv.c: Include stdlib.h.
* cache.c: Include stdlib.h.
sim/iq2000/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* iq2000.c: Include stdlib.h.
sim/m32r/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* traps.c: Include stdlib.h.
* m32r.c: Include stdlib.h.
sim/ppc/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* emul_unix.c: Include time.h.
---
sim/cris/ChangeLog | 5 +++++
sim/cris/cris-tmpl.c | 2 ++
sim/cris/traps.c | 1 +
sim/erc32/ChangeLog | 4 ++++
sim/erc32/func.c | 1 +
sim/frv/ChangeLog | 10 ++++++++++
sim/frv/cache.c | 1 +
sim/frv/frv.c | 1 +
sim/frv/interrupts.c | 1 +
sim/frv/memory.c | 1 +
sim/frv/profile.c | 1 +
sim/frv/registers.c | 1 +
sim/frv/traps.c | 2 ++
sim/iq2000/ChangeLog | 4 ++++
sim/iq2000/iq2000.c | 1 +
sim/m32r/ChangeLog | 5 +++++
sim/m32r/m32r.c | 1 +
sim/m32r/traps.c | 1 +
sim/ppc/ChangeLog | 4 ++++
sim/ppc/emul_unix.c | 1 +
20 files changed, 48 insertions(+)
diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c
index b5ad7189191..95579dbffa9 100644
--- a/sim/cris/cris-tmpl.c
+++ b/sim/cris/cris-tmpl.c
@@ -25,6 +25,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include <stdlib.h>
+
#define MY(f) XCONCAT3(crisv,BASENUM,f)
/* Dispatcher for break insn. */
diff --git a/sim/cris/traps.c b/sim/cris/traps.c
index 2aaa1f43b16..1c8ca41d14e 100644
--- a/sim/cris/traps.c
+++ b/sim/cris/traps.c
@@ -23,6 +23,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "bfd.h"
/* FIXME: get rid of targ-vals.h usage everywhere else. */
+#include <stdlib.h>
#include <stdarg.h>
#include <errno.h>
#ifdef HAVE_UNISTD_H
diff --git a/sim/erc32/func.c b/sim/erc32/func.c
index 98217f062ae..c6dfa1927ad 100644
--- a/sim/erc32/func.c
+++ b/sim/erc32/func.c
@@ -26,6 +26,7 @@
#include <dis-asm.h>
#include "sim-config.h"
#include <inttypes.h>
+#include <sys/time.h>
#define VAL(x) strtoul(x,(char **)NULL,0)
diff --git a/sim/frv/cache.c b/sim/frv/cache.c
index 9e2a99f5f7e..c10d46373f5 100644
--- a/sim/frv/cache.c
+++ b/sim/frv/cache.c
@@ -24,6 +24,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "cache.h"
#include "bfd.h"
+#include <stdlib.h>
void
frv_cache_init (SIM_CPU *cpu, FRV_CACHE *cache)
diff --git a/sim/frv/frv.c b/sim/frv/frv.c
index 88290be3e8e..fee59c2aae7 100644
--- a/sim/frv/frv.c
+++ b/sim/frv/frv.c
@@ -28,6 +28,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "bfd.h"
#include "gdb/sim-frv.h"
#include <math.h>
+#include <stdlib.h>
/* Maintain a flag in order to know when to write the address of the next
VLIW instruction into the LR register. Used by JMPL. JMPIL, and CALL
diff --git a/sim/frv/interrupts.c b/sim/frv/interrupts.c
index d38620c9a72..0b8ed763987 100644
--- a/sim/frv/interrupts.c
+++ b/sim/frv/interrupts.c
@@ -22,6 +22,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "bfd.h"
+#include <stdlib.h>
/* FR-V Interrupt table.
Describes the interrupts supported by the FR-V.
diff --git a/sim/frv/memory.c b/sim/frv/memory.c
index ea7f68e4349..5978d151627 100644
--- a/sim/frv/memory.c
+++ b/sim/frv/memory.c
@@ -23,6 +23,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "cgen-mem.h"
#include "bfd.h"
+#include <stdlib.h>
/* Check for alignment and access restrictions. Return the corrected address.
*/
diff --git a/sim/frv/profile.c b/sim/frv/profile.c
index c08950886d1..441590eb581 100644
--- a/sim/frv/profile.c
+++ b/sim/frv/profile.c
@@ -24,6 +24,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "sim-main.h"
#include "bfd.h"
+#include <stdlib.h>
#if WITH_PROFILE_MODEL_P
diff --git a/sim/frv/registers.c b/sim/frv/registers.c
index c9d26fda018..764a6755b3f 100644
--- a/sim/frv/registers.c
+++ b/sim/frv/registers.c
@@ -22,6 +22,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "bfd.h"
+#include <stdlib.h>
#define IMPL 1 /* Implemented */
#define SUP 1 /* Supervisor register */
diff --git a/sim/frv/traps.c b/sim/frv/traps.c
index 79ea1571ac2..c0ed9b1c49f 100644
--- a/sim/frv/traps.c
+++ b/sim/frv/traps.c
@@ -29,6 +29,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "bfd.h"
#include "libiberty.h"
+#include <stdlib.h>
+
CGEN_ATTR_VALUE_ENUM_TYPE frv_current_fm_slot;
/* The semantic code invokes this for invalid (unrecognized) instructions. */
diff --git a/sim/iq2000/iq2000.c b/sim/iq2000/iq2000.c
index 23a342983ce..e03c47919fd 100644
--- a/sim/iq2000/iq2000.c
+++ b/sim/iq2000/iq2000.c
@@ -23,6 +23,7 @@
#include "sim-main.h"
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include <stdlib.h>
enum
{
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c
index 1c5379cfd74..1d0a7356bb0 100644
--- a/sim/m32r/m32r.c
+++ b/sim/m32r/m32r.c
@@ -23,6 +23,7 @@
#include "sim-main.h"
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include <stdlib.h>
/* Return the size of REGNO in bytes. */
diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index 9edf66b58f1..9fca2b1ec1d 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -20,6 +20,7 @@
#include "sim-main.h"
#include "sim-syscall.h"
#include "targ-vals.h"
+#include <stdlib.h>
#define TRAP_FLUSH_CACHE 12
/* The semantic code invokes this for invalid (unrecognized) instructions. */
diff --git a/sim/ppc/emul_unix.c b/sim/ppc/emul_unix.c
index 92c3c1ededf..2616ae408ba 100644
--- a/sim/ppc/emul_unix.c
+++ b/sim/ppc/emul_unix.c
@@ -124,6 +124,7 @@ int getrusage();
#endif
#include <stdlib.h>
+#include <time.h>
#if defined(BSD) && !defined(errno) && (BSD < 199306) /* here BSD as just a bug */
extern int errno;
--
2.26.2
next prev parent reply other threads:[~2021-04-08 16:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-08 16:44 [PATCH 0/2] Fix some sim warnings Tom Tromey
2021-04-08 16:44 ` [PATCH 1/2] Do not use old-style definitions in sim Tom Tromey
2021-04-08 17:44 ` Mike Frysinger
2021-04-08 16:44 ` Tom Tromey [this message]
2021-04-08 17:43 ` [PATCH 2/2] Add system includes " Mike Frysinger
2021-04-08 18:32 ` Tom Tromey
2021-04-08 18:43 ` Tom Tromey
2021-04-08 19:26 ` Mike Frysinger
2021-04-08 19:30 ` Tom Tromey
2021-04-08 20:12 ` Mike Frysinger
2021-04-08 20:34 ` Tom Tromey
2021-04-08 20:58 ` Mike Frysinger
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