[PATCH 16/24] RISC-V sim: Check sbrk argument.

[Jim Wilson <jimw@sifive.com>]

From: Kito Cheng <kito.cheng@gmail.com>

If sbrk arg greater than memory size, then fail.

	sim/riscv/
	* sim-main.c (execute_i): In TARGET_sys_brk, when setting endbrk,
	add check for DEFAULT_MEM_SIZE.
---
 sim/riscv/sim-main.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 4275ee2..15d9876 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -1791,7 +1791,12 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
 		if (cpu->a0 == 0)
 		  cpu->a0 = cpu->endbrk;
 		else
-		  cpu->endbrk = cpu->a0;
+		  {
+		    if (cpu->a0 >= DEFAULT_MEM_SIZE)
+		      cpu->a0 = -1;
+		    else
+		      cpu->endbrk = cpu->a0;
+		  }
 		break;
 	      }
 	    case TARGET_SYS_gettimeofday:
-- 
2.7.4