From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH] sim: riscv: move __int128 check to configure
Date: Sun, 16 May 2021 00:14:34 -0400 [thread overview]
Message-ID: <20210516041434.28619-1-vapier@gentoo.org> (raw)
---
sim/ChangeLog | 4 ++++
sim/aarch64/ChangeLog | 4 ++++
sim/aarch64/config.in | 3 +++
sim/aarch64/configure | 14 ++++++++++++--
sim/arm/ChangeLog | 4 ++++
sim/arm/config.in | 3 +++
sim/arm/configure | 14 ++++++++++++--
sim/avr/ChangeLog | 4 ++++
sim/avr/config.in | 3 +++
sim/avr/configure | 14 ++++++++++++--
sim/bfin/ChangeLog | 4 ++++
sim/bfin/config.in | 3 +++
sim/bfin/configure | 14 ++++++++++++--
sim/bpf/ChangeLog | 4 ++++
sim/bpf/config.in | 3 +++
sim/bpf/configure | 14 ++++++++++++--
sim/cr16/ChangeLog | 4 ++++
sim/cr16/config.in | 3 +++
sim/cr16/configure | 14 ++++++++++++--
sim/cris/ChangeLog | 4 ++++
sim/cris/config.in | 3 +++
sim/cris/configure | 14 ++++++++++++--
sim/d10v/ChangeLog | 4 ++++
sim/d10v/config.in | 3 +++
sim/d10v/configure | 14 ++++++++++++--
sim/erc32/ChangeLog | 4 ++++
sim/erc32/config.in | 3 +++
sim/erc32/configure | 14 ++++++++++++--
sim/example-synacor/ChangeLog | 4 ++++
sim/example-synacor/config.in | 3 +++
sim/example-synacor/configure | 14 ++++++++++++--
sim/frv/ChangeLog | 4 ++++
sim/frv/config.in | 3 +++
sim/frv/configure | 14 ++++++++++++--
sim/ft32/ChangeLog | 4 ++++
sim/ft32/config.in | 3 +++
sim/ft32/configure | 14 ++++++++++++--
sim/h8300/ChangeLog | 4 ++++
sim/h8300/config.in | 3 +++
sim/h8300/configure | 14 ++++++++++++--
sim/iq2000/ChangeLog | 4 ++++
sim/iq2000/config.in | 3 +++
sim/iq2000/configure | 14 ++++++++++++--
sim/lm32/ChangeLog | 4 ++++
sim/lm32/config.in | 3 +++
sim/lm32/configure | 14 ++++++++++++--
sim/m32c/ChangeLog | 4 ++++
sim/m32c/config.in | 3 +++
sim/m32c/configure | 14 ++++++++++++--
sim/m32r/ChangeLog | 4 ++++
sim/m32r/config.in | 3 +++
sim/m32r/configure | 14 ++++++++++++--
sim/m4/sim_ac_common.m4 | 1 +
sim/m68hc11/ChangeLog | 4 ++++
sim/m68hc11/config.in | 3 +++
sim/m68hc11/configure | 14 ++++++++++++--
sim/mcore/ChangeLog | 4 ++++
sim/mcore/config.in | 3 +++
sim/mcore/configure | 14 ++++++++++++--
sim/microblaze/ChangeLog | 4 ++++
sim/microblaze/config.in | 3 +++
sim/microblaze/configure | 14 ++++++++++++--
sim/mips/ChangeLog | 4 ++++
sim/mips/config.in | 3 +++
sim/mips/configure | 14 ++++++++++++--
sim/mn10300/ChangeLog | 4 ++++
sim/mn10300/config.in | 3 +++
sim/mn10300/configure | 14 ++++++++++++--
sim/moxie/ChangeLog | 4 ++++
sim/moxie/config.in | 3 +++
sim/moxie/configure | 14 ++++++++++++--
sim/msp430/ChangeLog | 4 ++++
sim/msp430/config.in | 3 +++
sim/msp430/configure | 14 ++++++++++++--
sim/or1k/ChangeLog | 4 ++++
sim/or1k/config.in | 3 +++
sim/or1k/configure | 14 ++++++++++++--
sim/pru/ChangeLog | 4 ++++
sim/pru/config.in | 3 +++
sim/pru/configure | 14 ++++++++++++--
sim/riscv/ChangeLog | 5 +++++
sim/riscv/config.in | 3 +++
sim/riscv/configure | 14 ++++++++++++--
sim/riscv/sim-main.c | 2 +-
sim/rl78/ChangeLog | 4 ++++
sim/rl78/config.in | 3 +++
sim/rl78/configure | 14 ++++++++++++--
sim/rx/ChangeLog | 4 ++++
sim/rx/config.in | 3 +++
sim/rx/configure | 14 ++++++++++++--
sim/sh/ChangeLog | 4 ++++
sim/sh/config.in | 3 +++
sim/sh/configure | 14 ++++++++++++--
sim/v850/ChangeLog | 4 ++++
sim/v850/config.in | 3 +++
sim/v850/configure | 14 ++++++++++++--
96 files changed, 596 insertions(+), 63 deletions(-)
diff --git a/sim/m4/sim_ac_common.m4 b/sim/m4/sim_ac_common.m4
index 35fcbfc41995..aa10a6502722 100644
--- a/sim/m4/sim_ac_common.m4
+++ b/sim/m4/sim_ac_common.m4
@@ -75,6 +75,7 @@ AC_CHECK_MEMBERS([[struct stat.st_dev], [struct stat.st_ino],
#ifdef HAVE_SYS_STAT_H
#include <sys/stat.h>
#endif]])
+AC_CHECK_TYPES([__int128])
AC_CHECK_TYPES(socklen_t, [], [],
[#include <sys/types.h>
#include <sys/socket.h>
diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 6a2904cced73..bb45ffee576a 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -603,7 +603,7 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
static unsigned64
mulhu (unsigned64 a, unsigned64 b)
{
-#if defined(__GNUC__) && defined(__SIZEOF_INT128__)
+#ifdef HAVE___INT128
return ((__int128)a * b) >> 64;
#else
uint64_t t;
--
2.31.1
reply other threads:[~2021-05-16 4:14 UTC|newest]
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