From: Lancelot SIX <lsix@lancelotsix.com>
To: Pedro Alves <pedro@palves.net>
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH v3 2/2] gdb: Support stepping out from signal handler on riscv*-linux
Date: Thu, 8 Jul 2021 11:49:02 +0000 [thread overview]
Message-ID: <20210708114902.6zeicvsp4kunlyed@ubuntu.lan> (raw)
In-Reply-To: <eb9fa732-bdb8-9218-5b45-309d9d3f8693@palves.net>
On Thu, Jul 08, 2021 at 11:00:33AM +0100, Pedro Alves wrote:
> On 2021-07-07 1:30 a.m., Lancelot SIX via Gdb-patches wrote:
>
> > After this patch, all tests in gdb.base/sigstep.exp pass.
> >
> > Build and tested on riscv64-linux-gnu.
>
> Thanks. Other than a couple easyfix issues below, this LGTM.
>
> > #include "gdbarch.h"
> >
> > +/* The following value is derived from __NR_rt_sigreturn in
> > + <include/uapi/asm-generic/unistd.h> from the linux source tree. */
>
> s/linux/Linux/
>
> >
> > /* Other instructions are not interesting during the prologue scan, and
> > are ignored. */
> > @@ -1711,6 +1713,8 @@ riscv_insn::decode (struct gdbarch *gdbarch, CORE_ADDR pc)
> > decode_r_type_insn (SC, ival);
> > else if (is_sc_d_insn (ival))
> > decode_r_type_insn (SC, ival);
> > + else if (is_ecall_insn (ival))
> > + decode_i_type_insn (ECALL, ival);
>
> OOC, where are these is_FOO_insn functions declared/defined?
>
Hi,
There is a DECLARE_INSN macro that does that in gdb/riscv-tdep.c
/* Define a series of is_XXX_insn functions to check if the value INSN
is an instance of instruction XXX. */
#define DECLARE_INSN(INSN_NAME, INSN_MATCH, INSN_MASK) \
static inline bool is_ ## INSN_NAME ## _insn (long insn) \
{ \
return (insn & INSN_MASK) == INSN_MATCH; \
}
#include "opcode/riscv-opc.h"
#undef DECLARE_INSN
The macro is instanciated in include/opcode/riscv-opc.h as follows:
#define MATCH_EBREAK 0x100073
#define MASK_EBREAK 0xffffffff
[…]
#ifdef DECLARE_INSN
DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
#endif /* DECLARE_INSN */
> > @@ -3826,6 +3831,11 @@ riscv_next_pc (struct regcache *regcache, CORE_ADDR pc)
> > if (src1 >= src2)
> > next_pc = pc + insn.imm_signed ();
> > }
> > + else if (insn.opcode () == riscv_insn::ECALL)
> > + {
> > + if (tdep->syscall_next_pc != nullptr)
> > + next_pc = tdep->syscall_next_pc (get_current_frame ());
>
>
> else
> next_pc += 4;
>
> ?
OK, I’ll change that.
>
> > + }
> >
> > return next_pc;
> > }
>
> >
> > + /* Return the expected next PC if FRAME is stopped at a syscall
> > + instruction. */
> > + CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
>
> "if" -> "assuming" ?
OK, seems more appropriate.
Thanks,
Lancelot.
next prev parent reply other threads:[~2021-07-08 11:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-07 0:30 [PATCH v3 0/2] Fix gdb.base/sigstep.exp for riscv64-linux Lancelot SIX
2021-07-07 0:30 ` [PATCH v3 1/2] gdb/testsuite: Declare that riscv*-*-linux* cannot hardware_single_step Lancelot SIX
2021-07-08 10:00 ` Pedro Alves
2021-07-07 0:30 ` [PATCH v3 2/2] gdb: Support stepping out from signal handler on riscv*-linux Lancelot SIX
2021-07-08 10:00 ` Pedro Alves
2021-07-08 11:49 ` Lancelot SIX [this message]
2021-07-08 12:11 ` Lancelot SIX
2021-07-08 12:34 ` Pedro Alves
2021-07-07 21:01 ` [PATCH v3 0/2] Fix gdb.base/sigstep.exp for riscv64-linux Jim Wilson
2021-07-07 22:55 ` Lancelot SIX
2021-07-08 1:32 ` Jim Wilson
2021-07-08 9:44 ` Pedro Alves
2021-07-08 11:59 ` Lancelot SIX
2021-07-08 15:24 ` Jim Wilson
2021-07-16 22:13 ` Lancelot SIX
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