* [PATCH] sim: microblaze: replace custom basic types with common ones
@ 2021-09-09 1:31 Mike Frysinger
0 siblings, 0 replies; only message in thread
From: Mike Frysinger @ 2021-09-09 1:31 UTC (permalink / raw)
To: gdb-patches
The basic "byte" type conflicts with Windows headers, and we already
have common types that provide the right sizes. So replace these with
the common ones to avoid issues.
CC dv-sockser.o
In file included from /usr/i686-w64-mingw32/usr/include/wtypes.h:8,
from /usr/i686-w64-mingw32/usr/include/winscard.h:10,
from /usr/i686-w64-mingw32/usr/include/windows.h:97,
from /usr/i686-w64-mingw32/usr/include/winsock2.h:23,
from ../../gnulib/import/sys/socket.h:684,
from ../../gnulib/import/netinet/in.h:43,
from .../build/sim/../../../sim/microblaze/../common/dv-sockser.c:39:
/usr/i686-w64-mingw32/usr/include/rpcndr.h:63:25: error: conflicting types for ‘byte’; have ‘unsigned char’
63 | typedef unsigned char byte;
| ^~~~
In file included from .../buildsim/../../../sim/microblaze/sim-main.h:21,
from .../buildsim/../../../sim/microblaze/../common/dv-sockser.c:24:
.../buildsim/../../../sim/microblaze/microblaze.h:94:25: note: previous declaration of ‘byte’ with type ‘byte’ {aka ‘char’}
94 | typedef char byte;
| ^~~~
make: *** [Makefile:513: dv-sockser.o] Error 1
---
sim/microblaze/interp.c | 8 ++++----
sim/microblaze/microblaze.h | 19 ++++++-------------
sim/microblaze/microblaze.isa | 20 ++++++++++----------
sim/microblaze/sim-main.h | 12 ++++++------
4 files changed, 26 insertions(+), 33 deletions(-)
diff --git a/sim/microblaze/interp.c b/sim/microblaze/interp.c
index 94f50f1e4cd9..d2bd9e907e26 100644
--- a/sim/microblaze/interp.c
+++ b/sim/microblaze/interp.c
@@ -121,19 +121,19 @@ sim_engine_run (SIM_DESC sd,
{
SIM_CPU *cpu = STATE_CPU (sd, 0);
int needfetch;
- word inst;
+ signed_4 inst;
enum microblaze_instr op;
int memops;
int bonus_cycles;
int insts;
int w;
int cycs;
- word WLhash;
- ubyte carry;
+ signed_4 WLhash;
+ unsigned_1 carry;
bool imm_unsigned;
short ra, rb, rd;
long immword;
- uword oldpc, newpc;
+ unsigned_4 oldpc, newpc;
short delay_slot_enable;
short branch_taken;
short num_delay_slot; /* UNUSED except as reqd parameter */
diff --git a/sim/microblaze/microblaze.h b/sim/microblaze/microblaze.h
index 9c7f1db1edb6..2e1ddd32ca61 100644
--- a/sim/microblaze/microblaze.h
+++ b/sim/microblaze/microblaze.h
@@ -39,7 +39,7 @@
#define IMM_ENABLE CPU.imm_enable
#define IMM (IMM_ENABLE ? \
- (((uhalf)IMM_H << 16) | (uhalf)IMM_L) : \
+ (((unsigned_2)IMM_H << 16) | (unsigned_2)IMM_L) : \
(imm_unsigned ? \
(0xFFFF & IMM_L) : \
(IMM_L & 0x8000 ? \
@@ -55,9 +55,9 @@
#define MEM_RD_BYTE(X) sim_core_read_1 (cpu, 0, read_map, X)
#define MEM_RD_HALF(X) sim_core_read_2 (cpu, 0, read_map, X)
#define MEM_RD_WORD(X) sim_core_read_4 (cpu, 0, read_map, X)
-#define MEM_RD_UBYTE(X) (ubyte) MEM_RD_BYTE(X)
-#define MEM_RD_UHALF(X) (uhalf) MEM_RD_HALF(X)
-#define MEM_RD_UWORD(X) (uword) MEM_RD_WORD(X)
+#define MEM_RD_UBYTE(X) (unsigned_1) MEM_RD_BYTE(X)
+#define MEM_RD_UHALF(X) (unsigned_2) MEM_RD_HALF(X)
+#define MEM_RD_UWORD(X) (unsigned_4) MEM_RD_WORD(X)
#define MEM_WR_BYTE(X, D) sim_core_write_1 (cpu, 0, write_map, X, D)
#define MEM_WR_HALF(X, D) sim_core_write_2 (cpu, 0, write_map, X, D)
@@ -72,9 +72,9 @@
#define C_rd ((MSR & 0x4) >> 2)
#define C_wr(D) MSR = (D ? MSR | 0x80000004 : MSR & 0x7FFFFFFB)
-#define C_calc(X, Y, C) ((((uword)Y == MAX_WORD) && (C == 1)) ? \
+#define C_calc(X, Y, C) ((((unsigned_4)Y == MAX_WORD) && (C == 1)) ? \
1 : \
- ((MAX_WORD - (uword)X) < ((uword)Y + C)))
+ ((MAX_WORD - (unsigned_4)X) < ((unsigned_4)Y + C)))
#define BIP_MASK 0x00000008
#define CARRY_MASK 0x00000004
@@ -91,12 +91,5 @@
#define MAX_WORD 0xFFFFFFFF
#define MICROBLAZE_HALT_INST 0xb8000000
-typedef char byte;
-typedef short half;
-typedef int word;
-typedef unsigned char ubyte;
-typedef unsigned short uhalf;
-typedef unsigned int uword;
-
#endif /* MICROBLAZE_H */
diff --git a/sim/microblaze/microblaze.isa b/sim/microblaze/microblaze.isa
index 1d96e8fc1c7c..c811dce01194 100644
--- a/sim/microblaze/microblaze.isa
+++ b/sim/microblaze/microblaze.isa
@@ -171,31 +171,31 @@ INSTRUCTION(mul,
INSTRUCTION(bsrl,
0x11,
INST_TYPE_RD_RA_RB,
- RD = (uword)RA >> RB;
+ RD = (unsigned_4)RA >> RB;
PC += INST_SIZE)
INSTRUCTION(bsra,
0x11,
INST_TYPE_RD_RA_RB,
- RD = (word)RA >> RB;
+ RD = (signed_4)RA >> RB;
PC += INST_SIZE)
INSTRUCTION(bsll,
0x11,
INST_TYPE_RD_RA_RB,
- RD = (uword)RA << RB;
+ RD = (unsigned_4)RA << RB;
PC += INST_SIZE)
INSTRUCTION(idiv,
0x12,
INST_TYPE_RD_RA_RB,
- RD = (word) RB / (word) RA;
+ RD = (signed_4) RB / (signed_4) RA;
PC += INST_SIZE)
INSTRUCTION(idivu,
0x12,
INST_TYPE_RD_RA_RB,
- RD = (uword) RB / (uword) RA;
+ RD = (unsigned_4) RB / (unsigned_4) RA;
PC += INST_SIZE)
INSTRUCTION(muli,
@@ -207,19 +207,19 @@ INSTRUCTION(muli,
INSTRUCTION(bsrli,
0x19,
INST_TYPE_RD_RA_IMM5,
- RD = (uword)RA >> (IMM & 0x1F);
+ RD = (unsigned_4)RA >> (IMM & 0x1F);
PC += INST_SIZE)
INSTRUCTION(bsrai,
0x19,
INST_TYPE_RD_RA_IMM5,
- RD = (word)RA >> (IMM & 0x1F);
+ RD = (signed_4)RA >> (IMM & 0x1F);
PC += INST_SIZE)
INSTRUCTION(bslli,
0x19,
INST_TYPE_RD_RA_IMM5,
- RD = (uword)RA << (IMM & 0x1F);
+ RD = (unsigned_4)RA << (IMM & 0x1F);
PC += INST_SIZE)
INSTRUCTION(get,
@@ -298,7 +298,7 @@ INSTRUCTION(src,
0x24,
INST_TYPE_RD_RA,
CARRY = (RA & 0x1);
- RD = ((((int) (RA >> 1)) & 0x7FFFFFFF) | (uword)(C_rd << 31));
+ RD = ((((int) (RA >> 1)) & 0x7FFFFFFF) | (unsigned_4)(C_rd << 31));
C_wr(CARRY);
PC += INST_SIZE)
@@ -306,7 +306,7 @@ INSTRUCTION(srl,
0x24,
INST_TYPE_RD_RA,
CARRY = (RA & 0x1);
- RD = (uword) ((RA >> 1) & 0x7FFFFFFF);
+ RD = (unsigned_4) ((RA >> 1) & 0x7FFFFFFF);
C_wr(CARRY);
PC += INST_SIZE)
diff --git a/sim/microblaze/sim-main.h b/sim/microblaze/sim-main.h
index 1b63746c524d..cc301473ca23 100644
--- a/sim/microblaze/sim-main.h
+++ b/sim/microblaze/sim-main.h
@@ -35,12 +35,12 @@
gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro. */
struct microblaze_regset
{
- word regs[32]; /* primary registers */
- word spregs[2]; /* pc + msr */
- int cycles;
- int insts;
- ubyte imm_enable;
- half imm_high;
+ signed_4 regs[32]; /* primary registers */
+ signed_4 spregs[2]; /* pc + msr */
+ int cycles;
+ int insts;
+ unsigned_1 imm_enable;
+ signed_2 imm_high;
};
struct _sim_cpu {
--
2.33.0
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