From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-eopbgr70092.outbound.protection.outlook.com [40.107.7.92]) by sourceware.org (Postfix) with ESMTPS id D40223858029 for ; Tue, 11 Jan 2022 21:24:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D40223858029 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=syrmia.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=syrmia.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=CoRW58oGpwa927gTSkmjwY33VdveQ9hjsODxhbWgxbsMTMT9XTAvCVmqNBDHL+Np1p8SdFDLFLa8b+BcYLXsVp4DWzw5oG4XEYDqWQtOd3BEhHk8iqw50OsIRECJBQSuu+n3EWAk4N33y8wDCWCaLdO8jOmepnzWzOk4a9QANWP9HCf/n5QIBCv/vGg2/PfyTL0RgmgdQpbrPcaect7Jjo8+WbA32+FaUy8OWiIVJVJg15iPZs0UrV1RvMxr5EE00UYVxqwHzhpbi8sK8sgAhDMs9qNhbw8KiDPMItkTpDBFaww7Pv5zr8TnfAYBLnOpQSGRzUPTHdtyGeIxdANhZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=f/1+vEtUijVsMML6zvTC/VciLb8u2u/iKAaviDttA9I=; b=dSTvEQi/hxdY0oj5GEqBv4gSpmBzd1Z7PZ8nF97rCDQpEpw+7980nsnJUBNbJm+ASux7QeB1MRZOaaDUTHzu4OordK2lyVTF7o/zAxf5KASFjD+dLRSQ2FA73nBB0424hNxSnYEi989DDUoeTPxzWjmB9fdVgHx+FhzlxbSg2xO0Bmk0OJeXrXhJkPst5itB8rJv9oCY5LfyXsmdHmNBhXh/kJ+XfKI89UIxiMnu3ymsvPN7P0xFEJSYefBYAeEv8LuBqj+Ou9i905R9xG6KBO04vO73+9CXThcpr6ENoQL2iL9qJOyPavhM5KjUfJCM77yzdeKIN8YYiXKKvoFUjw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=syrmia.com; dmarc=pass action=none header.from=syrmia.com; dkim=pass header.d=syrmia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=syrmia.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=f/1+vEtUijVsMML6zvTC/VciLb8u2u/iKAaviDttA9I=; b=lR/LTdlEythjt1E/Y9KlYzYCorlz2ez1nbV8ESi8IQXOuteHIY0yTLdI/fujSBVxk8TjMuRnejR9+AiigvinarINk2/eCISa30A8wqhh9nVRx5uufzOWrX9Ktl58RatUffK/SU28nOmrhKWGNyCdRklZoq7FLHihQWPxIFokEQM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=syrmia.com; Received: from VI1PR03MB4208.eurprd03.prod.outlook.com (2603:10a6:803:51::25) by PA4PR03MB7278.eurprd03.prod.outlook.com (2603:10a6:102:10e::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4867.9; Tue, 11 Jan 2022 21:24:26 +0000 Received: from VI1PR03MB4208.eurprd03.prod.outlook.com ([fe80::cc1b:e71f:5d70:48a3]) by VI1PR03MB4208.eurprd03.prod.outlook.com ([fe80::cc1b:e71f:5d70:48a3%3]) with mapi id 15.20.4888.010; Tue, 11 Jan 2022 21:24:26 +0000 From: Dragan Mladjenovic To: gdb-patches@sourceware.org Cc: Mike Frysinger , "Maciej W . Rozycki" , Chao-ying Fu , Faraz Shahbazker Subject: [PATCH v3 3/4] sim: Add partial support for IEEE 754-2008 Date: Tue, 11 Jan 2022 22:24:05 +0100 Message-Id: <20220111212406.32312-4-Dragan.Mladjenovic@syrmia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220111212406.32312-1-Dragan.Mladjenovic@syrmia.com> References: <20220111212406.32312-1-Dragan.Mladjenovic@syrmia.com> Content-Type: text/plain X-ClientProxiedBy: VI1P193CA0003.EURP193.PROD.OUTLOOK.COM (2603:10a6:800:bd::13) To VI1PR03MB4208.eurprd03.prod.outlook.com (2603:10a6:803:51::25) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 55a4feaf-b240-4f28-9d7c-08d9d548beb1 X-MS-TrafficTypeDiagnostic: PA4PR03MB7278:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: X0pIX4c5/jJ2Dw4icJ+YHLXaQitqdegJUOTRxiNMdDG8ag5tNXAFOpKxJ/2rhTWgy38MOrdaTcHgoPH3Di3xK7XbLYjHpsyZ06AigvCqxawH3z+l8eMjgUkbUE05kmvJwqefgY6fxq5Cv71piQX2P6WeeHqWcE4cwXCJT20Vqm2wbNTkSS6ALXzx2BQbNzoHi5o4UWap/QPUNtXZL40Zc7LNMd47X3VM7wBv+fPGUmc4z5JfVzkpMGhJyAEXR4HM1ZzgAdIZRA/oXs6P4Z40bfXIlY40eqUWSQBTGg+aTJ9+BbW98WdlKLND904Cv/oNt6HPEmeLAReT2o3o795b0MeiiSFS0x6RaPzYh3AH0qDIjJTLTU/Tjbgh+Di14MKvHaBhwHdOA0xdLlfaRLw4T9qqmx5XqRDEgwJB9yJr/rKFnYmNcGYdr54K4R1VXw4iTXDUS9oPKYpHM3Njp2o53XyjCIW1Lp11ESXkrpcxx0DY1cB2ZMqEGKaLOqKUKKk4GVnKPZlZhlF5N/tOXnBBnBj2cHHoniXgg+rFajonpQ1ESP06iAxvGhTWakTo7Cva61S4+TJ88Tu/Mi9SIOqJuv/uvEMSnHAKN5sznIUj2sF13cDp4IO/lYDeiv2ucuBmgu6CwBEnGdm5IEuV3fH7QBdI26jPXCDBiTY5IPw+eyALSKkqZw6Uv6Ri74TBIONPt+VsZZWSaP2dahzPcqzSLA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR03MB4208.eurprd03.prod.outlook.com; PTR:; CAT:NONE; SFS:(39830400003)(396003)(346002)(366004)(136003)(376002)(83380400001)(5660300002)(36756003)(4326008)(8936002)(66556008)(186003)(54906003)(1076003)(26005)(6666004)(316002)(6506007)(66946007)(86362001)(6486002)(6512007)(8676002)(2616005)(66476007)(6916009)(38100700002)(52116002)(38350700002)(508600001)(2906002); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?XB/oL8VifLP6AL4pxJrVtdBfha/X/2917iUMUawEkPlWHoTGYOhIFvUOI5UC?= =?us-ascii?Q?y7GBlrI2EPiOhukpBy149LT1VvlH0+Ntqz+i57KPi41P2TK8BhcnmE10+sWo?= =?us-ascii?Q?bk3y4f/fLCmE/ssMqI6ckLXAKfxiq+P0qtHr8o27uso5Qv1OiBHXSaN13jH5?= =?us-ascii?Q?vy17mtMxQAuxsZPwwgsAvM4bPB0wvttxpXawR7ss4Jga342QEZkk/E/IubTY?= =?us-ascii?Q?xWUUj3RscC/l17g45mRF/URkp3NnYzhvOKXSLZJ5qRIOry3iPEEnVV97bAYE?= =?us-ascii?Q?20YqSCN/78IV/JNatwsnOmM/je4vIoJ/b4jpPs1vg2cteB7r+Q5v4fHI6nCh?= =?us-ascii?Q?y/P29NknLxMV+0vixE/q5/I7HXDAv5SYr8gg4zVuaiGiq7/DCUZVRPPqzKI7?= =?us-ascii?Q?sV0Yo7o9PLmYTkLYxqKGiaR5e/C4NQaJyCTewxMUxRbP5e+7oThCUf/fe5KD?= =?us-ascii?Q?1I8yX7687hu55pOgngfiQ9y4vrVde83nyPlisof1RNBvm6Luwp9PmpWm0DB4?= =?us-ascii?Q?eMVJXtYFb7yw7aTzUpJbb82zevk26QArXwxkWa2xrfCmegdePj+HGazSrrZZ?= =?us-ascii?Q?mtIC3mk83hlUO00DCFoUSTnpdXnpNmbtOtSXbmKmcdgJZ/LJBmH9piCbGJ+u?= =?us-ascii?Q?hywN/3E19k9iwkUkG8aeULOniUD7eb1tK9EDVSIEkmMSwl4vw54l5LDVxATm?= =?us-ascii?Q?Ii93pNxic4XiT7NkpMSoXQbtJDWBI09sxURSlAJESslTLdo4tlfRYsOb/h3J?= =?us-ascii?Q?w+B5JI6Mk2fRDxG2MGzVXkFRgV5BA+sLtgB1EFzsUeMwHZK2Jfq8V2gqINCS?= =?us-ascii?Q?SdXRJ4eibBDKTN40w5yROnEfn4R33FWjIYrPf2o63PSeMhurCMA5OrvMZ8eU?= =?us-ascii?Q?8saDJ+b9/Vk7dZ8KJnN/CkM58Vo4aF6LqNLocxiEEEpMgEosKhgIuXQWR1JC?= =?us-ascii?Q?+phHUq+1ulF+0/obHJWsJ4JoHXoJCDtOPEep9tMJlGBj71z3VCt4YZGMTjrw?= =?us-ascii?Q?4CmfCxbVm2tZ/2bKADzoCBefOzJ51s2wk0reKIlCs3ITJ+NSOo6ayvgqcB0W?= =?us-ascii?Q?abV9H7N7QMp4sypjyqVMToOulODWwLaBVnz56yOXuOAsVGA9kVxD/DRU0Ofx?= =?us-ascii?Q?NtY2apsNG5DCcYmiEpxfu81kNegi1IRu2mkMoeFolT3nubInrYAD6iW2SRNN?= =?us-ascii?Q?M6HDHDTO4NTOHkb4EaF+UHGu/9bjfbitnvkq/iPAemx3LayQ5w5PhmgpiSBY?= =?us-ascii?Q?m2C5cubKlrt7pjt8MzkHcJG88+n9XSLTyjtVpALUFnkIHgFvUIx+3iJHRP+v?= =?us-ascii?Q?jDDhqhEhdM3aoAgUiOWlwK8MklSRnUwJ5n1BxOPZ23p/1ViJ8UOb5K/w+bZr?= =?us-ascii?Q?qDBLTFTT1kUNHgeOmaljgjznB+63x6g00L/uSRohMgUL/MpcrY4I0NLZrSRC?= =?us-ascii?Q?zYQBm4nnz3o37/jNoIbu9c2PCiWLPmVk6UGksu2EyFga0LFXXYNLAx4ITZ9/?= =?us-ascii?Q?YafoAEr0tVS6rutzAf5mI55Vx2+B555quPCUmsBQqIXdMwNL65QQhUxqlfEn?= =?us-ascii?Q?CM78G0AHC0RS5u1hwmr9NrCqBIwcE55wCVPOjDcfGn95JF/fxymVroeQ/yK0?= =?us-ascii?Q?8vggfqyr/e2LikjqfK8FNpAXDL7ebadHqOqvzyOEysuaGoT4Np0AjYiqvWih?= =?us-ascii?Q?Ew1prw=3D=3D?= X-OriginatorOrg: syrmia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 55a4feaf-b240-4f28-9d7c-08d9d548beb1 X-MS-Exchange-CrossTenant-AuthSource: VI1PR03MB4208.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2022 21:24:26.5339 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 19214a73-c1ab-4e19-8f59-14bdcb09a66e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: l8WS/b4X0BiwcU9ABJ9iVD5xWUvQnoy4BL2hplqli+ziJzQzwIEVwdrpRQ2lBOtpk5RZNrH5SmgC3OjVEyGlKpZuroxnN8Bl4SbsvQK7gDI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB7278 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Jan 2022 21:24:36 -0000 From: Faraz Shahbazker 2022-01-11 Faraz Shahbazker sim/common/ChangeLog: * sim-fpu.c (sim_fpu_minmax_nan): New. (sim_fpu_max): Add variant behaviour for IEEE 754-2008. (sim_fpu_min): Likewise. (sim_fpu_is_un, sim_fpu_is_or): New. (sim_fpu_un, sim_fpu_or): New. (sim_fpu_current_mode): New. (sim_fpu_is_ieee754_2008, sim_fpu_is_ieee754_1985): New. (sim_fpu_set_mode): New. (sim_fpu_classify): New. * sim-fpu.h (sim_fpu_minmax_nan): New declaration. (sim_fpu_un, sim_fpu_or): New declarations. (sim_fpu_is_un, sim_fpu_is_or): New declarations. (sim_fpu_mode): New. (sim_fpu_is_ieee754_2008): New declaration. (sim_fpu_is_ieee754_1985): New declaration. (sim_fpu_set_mode): New declaration. (sim_fpu_classify): New declaration. --- sim/common/sim-fpu.c | 125 +++++++++++++++++++++++++++++++++++++++++-- sim/common/sim-fpu.h | 19 ++++++- 2 files changed, 139 insertions(+), 5 deletions(-) Changes from v2: Fix Werror failures. diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c index 9e6abf01391..3559d474fed 100644 --- a/sim/common/sim-fpu.c +++ b/sim/common/sim-fpu.c @@ -1005,6 +1005,30 @@ sim_fpu_op_nan (sim_fpu *f, const sim_fpu *l, const sim_fpu *r) return 0; } +/* NaN handling specific to min/max operations. */ + +INLINE_SIM_FPU (int) +sim_fpu_minmax_nan (sim_fpu *f, const sim_fpu *l, const sim_fpu *r) +{ + if (sim_fpu_is_snan (l) + || sim_fpu_is_snan (r) + || sim_fpu_is_ieee754_1985 ()) + return sim_fpu_op_nan (f, l, r); + else + /* if sim_fpu_is_ieee754_2008() + && ((sim_fpu_is_qnan (l) || sim_fpu_is_qnan (r))) */ + { + /* In IEEE754-2008: + * "minNum/maxNum is ... the canonicalized number if one + * operand is a number and the other a quiet NaN." */ + if (sim_fpu_is_qnan (l)) + *f = *r; + else /* if (sim_fpu_is_qnan (r)) */ + *f = *l; + return 0; + } +} + /* Arithmetic ops */ INLINE_SIM_FPU (int) @@ -1553,7 +1577,7 @@ sim_fpu_max (sim_fpu *f, const sim_fpu *r) { if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r)) - return sim_fpu_op_nan (f, l, r); + return sim_fpu_minmax_nan (f, l, r); if (sim_fpu_is_infinity (l)) { if (sim_fpu_is_infinity (r) @@ -1616,7 +1640,7 @@ sim_fpu_min (sim_fpu *f, const sim_fpu *r) { if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r)) - return sim_fpu_op_nan (f, l, r); + return sim_fpu_minmax_nan (f, l, r); if (sim_fpu_is_infinity (l)) { if (sim_fpu_is_infinity (r) @@ -1677,7 +1701,7 @@ INLINE_SIM_FPU (int) sim_fpu_neg (sim_fpu *f, const sim_fpu *r) { - if (sim_fpu_is_snan (r)) + if (sim_fpu_is_ieee754_1985 () && sim_fpu_is_snan (r)) { *f = *r; f->class = sim_fpu_class_qnan; @@ -1700,7 +1724,7 @@ sim_fpu_abs (sim_fpu *f, { *f = *r; f->sign = 0; - if (sim_fpu_is_snan (r)) + if (sim_fpu_is_ieee754_1985 () && sim_fpu_is_snan (r)) { f->class = sim_fpu_class_qnan; return sim_fpu_status_invalid_snan; @@ -2255,6 +2279,23 @@ sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r) return is; } +INLINE_SIM_FPU (int) +sim_fpu_is_un (const sim_fpu *l, + const sim_fpu *r) +{ + int is; + sim_fpu_un (&is, l, r); + return is; +} + +INLINE_SIM_FPU (int) +sim_fpu_is_or (const sim_fpu *l, + const sim_fpu *r) +{ + int is; + sim_fpu_or (&is, l, r); + return is; +} /* Compare operators */ @@ -2378,10 +2419,68 @@ sim_fpu_gt (int *is, return sim_fpu_lt (is, r, l); } +INLINE_SIM_FPU (int) +sim_fpu_un (int *is, const sim_fpu *l, const sim_fpu *r) +{ + if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r)) + { + *is = 1; + return 0; + } + + *is = 0; + return 0; +} + +INLINE_SIM_FPU (int) +sim_fpu_or (int *is, const sim_fpu *l, const sim_fpu *r) +{ + sim_fpu_un (is, l, r); + + /* Invert result. */ + *is = !*is; + return 0; +} + +INLINE_SIM_FPU(int) +sim_fpu_classify (const sim_fpu *f) +{ + switch (f->class) + { + case sim_fpu_class_snan: return SIM_FPU_IS_SNAN; + case sim_fpu_class_qnan: return SIM_FPU_IS_QNAN; + case sim_fpu_class_infinity: + if (!f->sign) + return SIM_FPU_IS_PINF; + else + return SIM_FPU_IS_NINF; + case sim_fpu_class_zero: + if (!f->sign) + return SIM_FPU_IS_PZERO; + else + return SIM_FPU_IS_NZERO; + case sim_fpu_class_number: + if (!f->sign) + return SIM_FPU_IS_PNUMBER; + else + return SIM_FPU_IS_NNUMBER; + case sim_fpu_class_denorm: + if (!f->sign) + return SIM_FPU_IS_PDENORM; + else + return SIM_FPU_IS_NDENORM; + default: + fprintf (stderr, "Bad switch\n"); + abort (); + } + return 0; +} /* A number of useful constants */ #if EXTERN_SIM_FPU_P +static sim_fpu_mode sim_fpu_current_mode = sim_fpu_ieee754_1985; + const sim_fpu sim_fpu_zero = { sim_fpu_class_zero, 0, 0, 0 }; @@ -2410,6 +2509,24 @@ const sim_fpu sim_fpu_max64 = { bool sim_fpu_quiet_nan_inverted = false; #endif +/* Specification swapping behaviour */ +INLINE_SIM_FPU (bool) +sim_fpu_is_ieee754_1985 (void) +{ + return (sim_fpu_current_mode == sim_fpu_ieee754_1985); +} + +INLINE_SIM_FPU (bool) +sim_fpu_is_ieee754_2008 (void) +{ + return (sim_fpu_current_mode == sim_fpu_ieee754_2008); +} + +INLINE_SIM_FPU (void) +sim_fpu_set_mode (const sim_fpu_mode m) +{ + sim_fpu_current_mode = m; +} /* For debugging */ diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h index 34a56efae22..c84b35811e9 100644 --- a/sim/common/sim-fpu.h +++ b/sim/common/sim-fpu.h @@ -252,6 +252,8 @@ INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f, INLINE_SIM_FPU (int) sim_fpu_op_nan (sim_fpu *f, const sim_fpu *l, const sim_fpu *r); +INLINE_SIM_FPU (int) sim_fpu_minmax_nan (sim_fpu *f, + const sim_fpu *l, const sim_fpu *r); @@ -302,7 +304,8 @@ INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d); /* INLINE_SIM_FPU (void) sim_fpu_f2 (sim_fpu *f, float s); */ INLINE_SIM_FPU (void) sim_fpu_d2 (sim_fpu *f, double d); - +/* IEEE754-2008 classifiction function. */ +INLINE_SIM_FPU (int) sim_fpu_classify (const sim_fpu *f); /* Specific number classes. @@ -343,6 +346,8 @@ INLINE_SIM_FPU (int) sim_fpu_eq (int *is, const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_ne (int *is, const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_ge (int *is, const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_gt (int *is, const sim_fpu *l, const sim_fpu *r); +INLINE_SIM_FPU (int) sim_fpu_un (int *is, const sim_fpu *l, const sim_fpu *r); +INLINE_SIM_FPU (int) sim_fpu_or (int *is, const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_is_lt (const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_is_le (const sim_fpu *l, const sim_fpu *r); @@ -350,8 +355,20 @@ INLINE_SIM_FPU (int) sim_fpu_is_eq (const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_is_ne (const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_is_ge (const sim_fpu *l, const sim_fpu *r); INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r); +INLINE_SIM_FPU (int) sim_fpu_is_un (const sim_fpu *l, const sim_fpu *r); +INLINE_SIM_FPU (int) sim_fpu_is_or (const sim_fpu *l, const sim_fpu *r); +/* Changes the behaviour of the library to IEEE754-2008 or IEEE754-1985. + * The default for the library is IEEE754-1985. */ +typedef enum +{ + sim_fpu_ieee754_1985, + sim_fpu_ieee754_2008, +} sim_fpu_mode; +INLINE_SIM_FPU (bool) sim_fpu_is_ieee754_1985 (void); +INLINE_SIM_FPU (bool) sim_fpu_is_ieee754_2008 (void); +INLINE_SIM_FPU (void) sim_fpu_set_mode (const sim_fpu_mode m); /* General number class and comparison operators. -- 2.17.1