From: Lancelot SIX <lsix@lancelotsix.com>
To: Youling Tang <tangyouling@loongson.cn>
Cc: gdb-patches@sourceware.org, "Maciej W. Rozycki" <macro@orcam.me.uk>
Subject: Re: [PATCH] gdb: mips: Fix the handling of complex type of function return value
Date: Wed, 16 Mar 2022 08:42:48 +0000 [thread overview]
Message-ID: <20220316084248.m5m2et3njtngeoge@Plymouth> (raw)
In-Reply-To: <1647406106-25723-1-git-send-email-tangyouling@loongson.cn>
On Wed, Mar 16, 2022 at 12:48:26PM +0800, Youling Tang wrote:
> $ objdump -d outputs/gdb.base/varargs/varargs
> 00000001200012e8 <find_max_float_real>:
> ...
> 1200013b8: c7c10000 lwc1 $f1,0(s8)
> 1200013bc: c7c00004 lwc1 $f0,4(s8)
> 1200013c0: 46000886 mov.s $f2,$f1
> 1200013c4: 46000046 mov.s $f1,$f0
> 1200013c8: 46001006 mov.s $f0,$f2
> 1200013cc: 46000886 mov.s $f2,$f1
> 1200013d0: 03c0e825 move sp,s8
> 1200013d4: dfbe0038 ld s8,56(sp)
> 1200013d8: 67bd0080 daddiu sp,sp,128
> 1200013dc: 03e00008 jr ra
> 1200013e0: 00000000 nop
>
> From the above disassembly, we can see that when the return value of the
> function is a complex type and len <= 2 * MIPS64_REGSIZE, the return value
> will be passed through $f0 and $f2, so fix the corresponding processing
> in mips_n32n64_return_value().
>
> $ make check RUNTESTFLAGS='GDB=../gdb gdb.base/varargs.exp --outdir=test'
>
> Before applying the patch:
> FAIL: gdb.base/varargs.exp: print find_max_float_real(4, fc1, fc2, fc3, fc4)
> FAIL: gdb.base/varargs.exp: print find_max_double_real(4, dc1, dc2, dc3, dc4)
>
> # of expected passes 9
> # of unexpected failures 2
>
> After applying the patch:
> # of expected passes 11
>
> Signed-off-by: Youling Tang <tangyouling@loongson.cn>
> ---
> gdb/mips-tdep.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
> index 7e37578..cddb8f8 100644
> --- a/gdb/mips-tdep.c
> +++ b/gdb/mips-tdep.c
> @@ -5224,9 +5224,10 @@ mips_n32n64_return_value (struct gdbarch *gdbarch, struct value *function,
>
> if (TYPE_LENGTH (type) > 2 * MIPS64_REGSIZE)
> return RETURN_VALUE_STRUCT_CONVENTION;
> - else if (type->code () == TYPE_CODE_FLT
> + else if ((type->code () == TYPE_CODE_FLT
> && TYPE_LENGTH (type) == 16
> && tdep->mips_fpu_type != MIPS_FPU_NONE)
Hi,
Just minor note, those 2 lines above should be indented 2 more space I
think (so the && operator continues to vertically align with "type->code
()").
> + || (type->code () == TYPE_CODE_COMPLEX))
I do not think the extra set of parens are requires (but they do no harm
either).
For the rest, it seems reasonable to me but I’ll let MIPS / global
maintainers comment.
Best,
Lancelot.
> {
> /* A 128-bit floating-point value fills both $f0 and $f2. The
> two registers are used in the same as memory order, so the
> --
> 2.1.0
>
--
Lancelot SIX
next prev parent reply other threads:[~2022-03-16 8:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 4:48 Youling Tang
2022-03-16 8:42 ` Lancelot SIX [this message]
2022-03-16 9:00 ` Youling Tang
2022-03-16 11:22 ` Andrew Burgess
2022-03-16 18:26 ` Maciej W. Rozycki
2022-03-17 7:01 ` Youling Tang
2022-04-06 22:46 ` [COMMITTED PATCH v2] " Maciej W. Rozycki
2022-04-07 2:19 ` Youling Tang
2022-04-11 15:32 ` Maciej W. Rozycki
2022-04-12 0:46 ` Youling Tang
2022-04-08 17:05 ` Richard Sandiford
2022-04-11 15:37 ` Maciej W. Rozycki
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