From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.baldwin.cx (bigwig.baldwin.cx [IPv6:2607:f138:0:13::2]) by sourceware.org (Postfix) with ESMTPS id A8CD2394D886 for ; Wed, 16 Mar 2022 19:46:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A8CD2394D886 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=FreeBSD.org Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=FreeBSD.org Received: from ralph.com (ralph.baldwin.cx [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id 0D6FE1A84E39 for ; Wed, 16 Mar 2022 15:46:17 -0400 (EDT) From: John Baldwin To: gdb-patches@sourceware.org Subject: [RFC PATCH 4/4] Support XSAVE layouts for the current host in the FreeBSD/amd64 target. Date: Wed, 16 Mar 2022 12:46:08 -0700 Message-Id: <20220316194608.89528-5-jhb@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220316194608.89528-1-jhb@FreeBSD.org> References: <20220316194608.89528-1-jhb@FreeBSD.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (mail.baldwin.cx [0.0.0.0]); Wed, 16 Mar 2022 15:46:18 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.103.1 at mail.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_STATUS, KHOP_HELO_FCRDNS, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Mar 2022 19:46:20 -0000 Use the CPUID instruction to fetch the offsets of supported state components. --- gdb/amd64-fbsd-nat.c | 73 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/gdb/amd64-fbsd-nat.c b/gdb/amd64-fbsd-nat.c index 98a1af03a66..f749a022611 100644 --- a/gdb/amd64-fbsd-nat.c +++ b/gdb/amd64-fbsd-nat.c @@ -28,11 +28,15 @@ #include #include #include +#ifdef PT_GETXSTATE_INFO +#include +#endif #include "fbsd-nat.h" #include "amd64-tdep.h" #include "amd64-fbsd-tdep.h" #include "amd64-nat.h" +#include "i387-tdep.h" #include "x86-nat.h" #include "gdbsupport/x86-xstate.h" #include "x86-bsd-nat.h" @@ -41,6 +45,15 @@ class amd64_fbsd_nat_target final : public x86bsd_nat_target { public: +#ifdef PT_GETXSTATE_INFO + enum target_xfer_status xfer_partial (enum target_object object, + const char *annex, + gdb_byte *readbuf, + const gdb_byte *writebuf, + ULONGEST offset, ULONGEST len, + ULONGEST *xfered_len) override; +#endif + void fetch_registers (struct regcache *, int) override; void store_registers (struct regcache *, int) override; @@ -55,6 +68,37 @@ static amd64_fbsd_nat_target the_amd64_fbsd_nat_target; #ifdef PT_GETXSTATE_INFO static size_t xsave_len; +static struct xsave_offsets xsave_offsets; + +/* Implement the "xfer_partial" target_ops method. */ + +enum target_xfer_status +amd64_fbsd_nat_target::xfer_partial (enum target_object object, + const char *annex, gdb_byte *readbuf, + const gdb_byte *writebuf, + ULONGEST offset, ULONGEST len, + ULONGEST *xfered_len) +{ + switch (object) + { + case TARGET_OBJECT_X86_XSAVE_OFFSETS: + if (xsave_len == 0) + return TARGET_XFER_E_IO; + + if (offset > sizeof (xsave_offsets)) + return TARGET_XFER_E_IO; + + if (offset + len > sizeof (xsave_offsets)) + len = sizeof (xsave_offsets) - offset; + + memcpy (readbuf, ((gdb_byte *) &xsave_offsets) + offset, len); + *xfered_len = len; + return len == 0 ? TARGET_XFER_EOF : TARGET_XFER_OK; + default: + return fbsd_nat_target::xfer_partial (object, annex, readbuf, writebuf, + offset, len, xfered_len); + } +} #endif /* This is a layout of the amd64 'struct reg' but with i386 @@ -304,6 +348,34 @@ amd64fbsd_supply_pcb (struct regcache *regcache, struct pcb *pcb) } +#ifdef PT_GETXSTATE_INFO +/* Fetch the offset a specific XSAVE extended region. */ +static int +xsave_leaf_offset (uint64_t xcr0, int leaf) +{ + uint32_t eax, ebx, ecx, edx; + + if ((xcr0 & (1ULL << leaf)) == 0) + return -1; + + __cpuid_count(0xd, leaf, eax, ebx, ecx, edx); + return ebx; +} + +/* Fetch the offsets of the XSAVE extended regions on the running host. */ +static void +probe_xsave_layout (uint64_t xcr0) +{ + xsave_offsets.avx_offset = xsave_leaf_offset(xcr0, 2); + xsave_offsets.bndregs_offset = xsave_leaf_offset(xcr0, 3); + xsave_offsets.bndcfg_offset = xsave_leaf_offset(xcr0, 4); + xsave_offsets.avx512_k_offset = xsave_leaf_offset(xcr0, 5); + xsave_offsets.avx512_zmm_h_offset = xsave_leaf_offset(xcr0, 6); + xsave_offsets.avx512_zmm_offset = xsave_leaf_offset(xcr0, 7); + xsave_offsets.pkru_offset = xsave_leaf_offset(xcr0, 9); +} +#endif + /* Implement the read_description method. */ const struct target_desc * @@ -330,6 +402,7 @@ amd64_fbsd_nat_target::read_description () { xsave_len = info.xsave_len; xcr0 = info.xsave_mask; + probe_xsave_layout (xcr0); } xsave_probed = 1; } -- 2.34.1