From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.baldwin.cx (bigwig.baldwin.cx [66.216.25.90]) by sourceware.org (Postfix) with ESMTPS id 2FBF4385DC3B for ; Thu, 17 Mar 2022 18:37:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2FBF4385DC3B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=FreeBSD.org Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=FreeBSD.org Received: from ralph.com (ralph.baldwin.cx [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id 2B7CA1A84E64; Thu, 17 Mar 2022 14:37:34 -0400 (EDT) From: John Baldwin To: gdb-patches@sourceware.org Cc: Willgerodt, Felix Subject: [RFC PATCH v2 4/5] Support XSAVE layouts for the current host in the FreeBSD/amd64 target. Date: Thu, 17 Mar 2022 11:36:02 -0700 Message-Id: <20220317183603.34789-5-jhb@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220317183603.34789-1-jhb@FreeBSD.org> References: <20220317183603.34789-1-jhb@FreeBSD.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (mail.baldwin.cx [0.0.0.0]); Thu, 17 Mar 2022 14:37:34 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.103.1 at mail.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_STATUS, KHOP_HELO_FCRDNS, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Mar 2022 18:37:36 -0000 Use the CPUID instruction to fetch the offsets of supported state components. --- gdb/amd64-fbsd-nat.c | 90 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 82 insertions(+), 8 deletions(-) diff --git a/gdb/amd64-fbsd-nat.c b/gdb/amd64-fbsd-nat.c index 98a1af03a66..9de5dee7a62 100644 --- a/gdb/amd64-fbsd-nat.c +++ b/gdb/amd64-fbsd-nat.c @@ -28,11 +28,15 @@ #include #include #include +#ifdef PT_GETXSTATE_INFO +#include +#endif #include "fbsd-nat.h" #include "amd64-tdep.h" #include "amd64-fbsd-tdep.h" #include "amd64-nat.h" +#include "i387-tdep.h" #include "x86-nat.h" #include "gdbsupport/x86-xstate.h" #include "x86-bsd-nat.h" @@ -41,6 +45,15 @@ class amd64_fbsd_nat_target final : public x86bsd_nat_target { public: +#ifdef PT_GETXSTATE_INFO + enum target_xfer_status xfer_partial (enum target_object object, + const char *annex, + gdb_byte *readbuf, + const gdb_byte *writebuf, + ULONGEST offset, ULONGEST len, + ULONGEST *xfered_len) override; +#endif + void fetch_registers (struct regcache *, int) override; void store_registers (struct regcache *, int) override; @@ -54,7 +67,37 @@ class amd64_fbsd_nat_target final static amd64_fbsd_nat_target the_amd64_fbsd_nat_target; #ifdef PT_GETXSTATE_INFO -static size_t xsave_len; +static x86_xsave_layout xsave_layout; + +/* Implement the "xfer_partial" target_ops method. */ + +enum target_xfer_status +amd64_fbsd_nat_target::xfer_partial (enum target_object object, + const char *annex, gdb_byte *readbuf, + const gdb_byte *writebuf, + ULONGEST offset, ULONGEST len, + ULONGEST *xfered_len) +{ + switch (object) + { + case TARGET_OBJECT_X86_XSAVE_LAYOUT: + if (xsave_layout.sizeof_xsave == 0) + return TARGET_XFER_E_IO; + + if (offset > sizeof (xsave_layout)) + return TARGET_XFER_E_IO; + + if (offset + len > sizeof (xsave_layout)) + len = sizeof (xsave_layout) - offset; + + memcpy (readbuf, ((gdb_byte *) &xsave_layout) + offset, len); + *xfered_len = len; + return len == 0 ? TARGET_XFER_EOF : TARGET_XFER_OK; + default: + return fbsd_nat_target::xfer_partial (object, annex, readbuf, writebuf, + offset, len, xfered_len); + } +} #endif /* This is a layout of the amd64 'struct reg' but with i386 @@ -152,9 +195,9 @@ amd64_fbsd_nat_target::fetch_registers (struct regcache *regcache, int regnum) fetching the FPU/XSAVE state unnecessarily. */ #ifdef PT_GETXSTATE_INFO - if (xsave_len != 0) + if (xsave_layout.sizeof_xsave != 0) { - void *xstateregs = alloca (xsave_len); + void *xstateregs = alloca (xsave_layout.sizeof_xsave); if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) == -1) perror_with_name (_("Couldn't get extended state status")); @@ -229,9 +272,9 @@ amd64_fbsd_nat_target::store_registers (struct regcache *regcache, int regnum) fetching the FPU/XSAVE state unnecessarily. */ #ifdef PT_GETXSTATE_INFO - if (xsave_len != 0) + if (xsave_layout.sizeof_xsave != 0) { - void *xstateregs = alloca (xsave_len); + void *xstateregs = alloca (xsave_layout.sizeof_xsave); if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) == -1) perror_with_name (_("Couldn't get extended state status")); @@ -239,7 +282,7 @@ amd64_fbsd_nat_target::store_registers (struct regcache *regcache, int regnum) amd64_collect_xsave (regcache, regnum, xstateregs, 0); if (ptrace (PT_SETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, - xsave_len) == -1) + xsave_layout.sizeof_xsave) == -1) perror_with_name (_("Couldn't write extended state status")); return; } @@ -304,6 +347,37 @@ amd64fbsd_supply_pcb (struct regcache *regcache, struct pcb *pcb) } +#ifdef PT_GETXSTATE_INFO +/* Fetch the offset of a specific XSAVE extended region. */ +static int +xsave_leaf_offset (uint64_t xcr0, int leaf) +{ + uint32_t eax, ebx, ecx, edx; + + if ((xcr0 & (1ULL << leaf)) == 0) + return 0; + + __cpuid_count(0xd, leaf, eax, ebx, ecx, edx); + return ebx; +} + +/* Fetch the offsets of the XSAVE extended regions on the running host. */ +static void +probe_xsave_layout (const struct ptrace_xstate_info &info) +{ + if (info.xsave_len == 0) + return; + xsave_layout.sizeof_xsave = info.xsave_len; + xsave_layout.avx_offset = xsave_leaf_offset(info.xsave_mask, 2); + xsave_layout.bndregs_offset = xsave_leaf_offset(info.xsave_mask, 3); + xsave_layout.bndcfg_offset = xsave_leaf_offset(info.xsave_mask, 4); + xsave_layout.avx512_k_offset = xsave_leaf_offset(info.xsave_mask, 5); + xsave_layout.avx512_zmm_h_offset = xsave_leaf_offset(info.xsave_mask, 6); + xsave_layout.avx512_zmm_offset = xsave_leaf_offset(info.xsave_mask, 7); + xsave_layout.pkru_offset = xsave_leaf_offset(info.xsave_mask, 9); +} +#endif + /* Implement the read_description method. */ const struct target_desc * @@ -328,13 +402,13 @@ amd64_fbsd_nat_target::read_description () if (ptrace (PT_GETXSTATE_INFO, inferior_ptid.pid (), (PTRACE_TYPE_ARG3) &info, sizeof (info)) == 0) { - xsave_len = info.xsave_len; xcr0 = info.xsave_mask; + probe_xsave_layout (info); } xsave_probed = 1; } - if (xsave_len != 0) + if (xsave_layout.sizeof_xsave != 0) { if (is64) return amd64_target_description (xcr0, true); -- 2.34.1