From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.baldwin.cx (bigwig.baldwin.cx [66.216.25.90]) by sourceware.org (Postfix) with ESMTPS id B59F9385E007; Thu, 24 Mar 2022 20:56:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B59F9385E007 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=FreeBSD.org Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=FreeBSD.org Received: from ralph.com (ralph.baldwin.cx [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id 01D981A84E1E; Thu, 24 Mar 2022 16:56:24 -0400 (EDT) From: John Baldwin To: binutils@sourceware.org, gdb-patches@sourceware.org Subject: [PATCH 4/5] FreeBSD/x86: Read segment base registers from NT_X86_SEGBASES. Date: Thu, 24 Mar 2022 13:56:15 -0700 Message-Id: <20220324205616.8517-5-jhb@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220324205616.8517-1-jhb@FreeBSD.org> References: <20220324205616.8517-1-jhb@FreeBSD.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (mail.baldwin.cx [0.0.0.0]); Thu, 24 Mar 2022 16:56:25 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.103.1 at mail.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_STATUS, KHOP_HELO_FCRDNS, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Mar 2022 20:56:27 -0000 FreeBSD kernels recently grew a new register core dump note containing the base addresses of the %fs and %gs segments (corresponding to the %fsbase and %gsbase registers). Parse this note to permit inspecting TLS variables in core dumps. Native processes already supported TLS via older ptrace() operations. --- gdb/amd64-fbsd-tdep.c | 18 ++++++++++++++++++ gdb/i386-fbsd-tdep.c | 18 ++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/gdb/amd64-fbsd-tdep.c b/gdb/amd64-fbsd-tdep.c index da5c297902d..55764beaad2 100644 --- a/gdb/amd64-fbsd-tdep.c +++ b/gdb/amd64-fbsd-tdep.c @@ -37,6 +37,9 @@ 16-bit segment registers. */ #define AMD64_FBSD_SIZEOF_GREGSET (22 * 8) +/* The segment base register set consists of 2 64-bit registers. */ +#define AMD64_FBSD_SIZEOF_SEGBASES_REGSET (2 * 8) + /* Register maps. */ static const struct regcache_map_entry amd64_fbsd_gregmap[] = @@ -70,6 +73,13 @@ static const struct regcache_map_entry amd64_fbsd_gregmap[] = { 0 } }; +static const struct regcache_map_entry amd64_fbsd_segbases_regmap[] = +{ + { 1, AMD64_FSBASE_REGNUM, 0 }, + { 1, AMD64_GSBASE_REGNUM, 0 }, + { 0 } +}; + /* This layout including fsbase and gsbase was adopted in FreeBSD 8.0. */ @@ -120,6 +130,11 @@ const struct regset amd64_fbsd_gregset = amd64_fbsd_gregmap, regcache_supply_regset, regcache_collect_regset }; +const struct regset amd64_fbsd_segbases_regset = +{ + amd64_fbsd_segbases_regmap, regcache_supply_regset, regcache_collect_regset +}; + /* Support for signal handlers. */ /* In a signal frame, rsp points to a 'struct sigframe' which is @@ -253,6 +268,9 @@ amd64fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch, &amd64_fbsd_gregset, NULL, cb_data); cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, &amd64_fpregset, NULL, cb_data); + cb (".reg-x86-segbases", AMD64_FBSD_SIZEOF_SEGBASES_REGSET, + AMD64_FBSD_SIZEOF_SEGBASES_REGSET, &amd64_fbsd_segbases_regset, + "segment bases", cb_data); cb (".reg-xstate", X86_XSTATE_SIZE (tdep->xcr0), X86_XSTATE_SIZE (tdep->xcr0), &amd64fbsd_xstateregset, "XSAVE extended state", cb_data); } diff --git a/gdb/i386-fbsd-tdep.c b/gdb/i386-fbsd-tdep.c index 16ffd576323..fad091f8472 100644 --- a/gdb/i386-fbsd-tdep.c +++ b/gdb/i386-fbsd-tdep.c @@ -35,6 +35,9 @@ /* The general-purpose regset consists of 19 32-bit slots. */ #define I386_FBSD_SIZEOF_GREGSET (19 * 4) +/* The segment base register set consists of 2 32-bit registers. */ +#define I386_FBSD_SIZEOF_SEGBASES_REGSET (2 * 4) + /* Register maps. */ static const struct regcache_map_entry i386_fbsd_gregmap[] = @@ -61,6 +64,13 @@ static const struct regcache_map_entry i386_fbsd_gregmap[] = { 0 } }; +static const struct regcache_map_entry i386_fbsd_segbases_regmap[] = +{ + { 1, I386_FSBASE_REGNUM, 0 }, + { 1, I386_GSBASE_REGNUM, 0 }, + { 0 } +}; + /* This layout including fsbase and gsbase was adopted in FreeBSD 8.0. */ @@ -103,6 +113,11 @@ const struct regset i386_fbsd_gregset = i386_fbsd_gregmap, regcache_supply_regset, regcache_collect_regset }; +const struct regset i386_fbsd_segbases_regset = +{ + i386_fbsd_segbases_regmap, regcache_supply_regset, regcache_collect_regset +}; + /* Support for signal handlers. */ /* In a signal frame, esp points to a 'struct sigframe' which is @@ -316,6 +331,9 @@ i386fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch, &i386_fbsd_gregset, NULL, cb_data); cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, &i386_fpregset, NULL, cb_data); + cb (".reg-x86-segbases", I386_FBSD_SIZEOF_SEGBASES_REGSET, + I386_FBSD_SIZEOF_SEGBASES_REGSET, &i386_fbsd_segbases_regset, + "segment bases", cb_data); if (tdep->xcr0 & X86_XSTATE_AVX) cb (".reg-xstate", X86_XSTATE_SIZE (tdep->xcr0), -- 2.34.1