* [PATCH v4 0/5] arm: Add support for multiple stacks on Cortex-M
@ 2022-04-01 9:16 Christophe Lyon
2022-04-01 9:16 ` [PATCH v4 1/5] gdb/arm: Fix prologue analysis to support vpush Christophe Lyon
0 siblings, 1 reply; 3+ messages in thread
From: Christophe Lyon @ 2022-04-01 9:16 UTC (permalink / raw)
To: gdb-patches; +Cc: torbjorn.svensson, yvan.roux, Christophe Lyon
This patch series introduces support for the multiple stack pointers
on v8-M architecture (MSP_S, MSP_NS, PSP_S, PSP_NS).
This enables to unwind through Secure vs Non-secure context switches.
Along the way, the first patch adds support to detect vpush
instructions in function prologues, which in particular is used in the
CMSE trampolines.
v4 addresses comments received about v2/v3 from Joel, as well as
others from Luis.
Christophe Lyon (5):
gdb/arm: Fix prologue analysis to support vpush
gdb/arm: Define MSP and PSP registers for M-Profile
gdb/arm: Introduce arm_cache_init
gdb/arm: Add support for multiple stack pointers on Cortex-M
gdb/arm: Extend arm_m_addr_is_magic to support FNC_RETURN, add
unwind-ns-to-s command
gdb/NEWS | 5 +
gdb/arch/arm.c | 6 +
gdb/arch/arm.h | 1 +
gdb/arm-tdep.c | 685 +++++++++++++++++++++++++-----
gdb/arm-tdep.h | 10 +
gdb/doc/gdb.texinfo | 10 +
gdb/features/Makefile | 1 +
gdb/features/arm/arm-m-system.c | 15 +
gdb/features/arm/arm-m-system.xml | 12 +
gdb/features/arm/arm-secext.c | 17 +
gdb/features/arm/arm-secext.xml | 15 +
11 files changed, 678 insertions(+), 99 deletions(-)
create mode 100644 gdb/features/arm/arm-m-system.c
create mode 100644 gdb/features/arm/arm-m-system.xml
create mode 100644 gdb/features/arm/arm-secext.c
create mode 100644 gdb/features/arm/arm-secext.xml
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v4 1/5] gdb/arm: Fix prologue analysis to support vpush
2022-04-01 9:16 [PATCH v4 0/5] arm: Add support for multiple stacks on Cortex-M Christophe Lyon
@ 2022-04-01 9:16 ` Christophe Lyon
0 siblings, 0 replies; 3+ messages in thread
From: Christophe Lyon @ 2022-04-01 9:16 UTC (permalink / raw)
To: gdb-patches
Cc: torbjorn.svensson, yvan.roux, Christophe Lyon, Christophe Lyon
From: Christophe Lyon <christophe.lyon@foss.st.com>
While working on adding support for Non-secure/Secure modes unwinding,
I noticed that the prologue analysis lacked support for vpush, which
is used for instance in the CMSE stub routine.
This patch updates thumb_analyze_prologue accordingly, adding support
for vpush of D-registers.
Signed-off-by: Christophe Lyon <christophe.lyon@foss.st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@arm.com>
---
gdb/arm-tdep.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index d36856e1f3b..9e623057e4a 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -896,6 +896,35 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
regs[bits (insn, 0, 3)] = addr;
}
+ /* vstmdb Rn{!}, { D-registers } (aka vpush). */
+ else if ((insn & 0xff20) == 0xed20
+ && (inst2 & 0x0f00) == 0x0b00
+ && pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
+ {
+ /* Address SP points to. */
+ pv_t addr = regs[bits (insn, 0, 3)];
+
+ /* Number of registers saved. */
+ unsigned int number = bits (inst2, 0, 7) >> 1;
+
+ /* First register to save. */
+ int vd = bits (inst2, 12, 15) | (bits (insn, 6, 6) << 4);
+
+ if (stack.store_would_trash (addr))
+ break;
+
+ /* Calculate offsets of saved registers. */
+ for (; number > 0; number--)
+ {
+ addr = pv_add_constant (addr, -8);
+ stack.store (addr, 8, pv_register (ARM_D0_REGNUM
+ + vd + number, 0));
+ }
+
+ /* Writeback SP to account for the saved registers. */
+ regs[bits (insn, 0, 3)] = addr;
+ }
+
else if ((insn & 0xff50) == 0xe940 /* strd Rt, Rt2,
[Rn, #+/-imm]{!} */
&& pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v4 0/5] arm: Add support for multiple stacks on Cortex-M
@ 2022-04-01 9:18 Christophe Lyon
2022-04-01 9:18 ` [PATCH v4 1/5] gdb/arm: Fix prologue analysis to support vpush Christophe Lyon
0 siblings, 1 reply; 3+ messages in thread
From: Christophe Lyon @ 2022-04-01 9:18 UTC (permalink / raw)
To: gdb-patches; +Cc: torbjorn.svensson, yvan.roux, Christophe Lyon
This patch series introduces support for the multiple stack pointers
on v8-M architecture (MSP_S, MSP_NS, PSP_S, PSP_NS).
This enables to unwind through Secure vs Non-secure context switches.
Along the way, the first patch adds support to detect vpush
instructions in function prologues, which in particular is used in the
CMSE trampolines.
v4 addresses comments received about v2/v3 from Joel, as well as
others from Luis.
Christophe Lyon (5):
gdb/arm: Fix prologue analysis to support vpush
gdb/arm: Define MSP and PSP registers for M-Profile
gdb/arm: Introduce arm_cache_init
gdb/arm: Add support for multiple stack pointers on Cortex-M
gdb/arm: Extend arm_m_addr_is_magic to support FNC_RETURN, add
unwind-ns-to-s command
gdb/NEWS | 5 +
gdb/arch/arm.c | 6 +
gdb/arch/arm.h | 1 +
gdb/arm-tdep.c | 685 +++++++++++++++++++++++++-----
gdb/arm-tdep.h | 10 +
gdb/doc/gdb.texinfo | 10 +
gdb/features/Makefile | 1 +
gdb/features/arm/arm-m-system.c | 15 +
gdb/features/arm/arm-m-system.xml | 12 +
gdb/features/arm/arm-secext.c | 17 +
gdb/features/arm/arm-secext.xml | 15 +
11 files changed, 678 insertions(+), 99 deletions(-)
create mode 100644 gdb/features/arm/arm-m-system.c
create mode 100644 gdb/features/arm/arm-m-system.xml
create mode 100644 gdb/features/arm/arm-secext.c
create mode 100644 gdb/features/arm/arm-secext.xml
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v4 1/5] gdb/arm: Fix prologue analysis to support vpush
2022-04-01 9:18 [PATCH v4 0/5] arm: Add support for multiple stacks on Cortex-M Christophe Lyon
@ 2022-04-01 9:18 ` Christophe Lyon
0 siblings, 0 replies; 3+ messages in thread
From: Christophe Lyon @ 2022-04-01 9:18 UTC (permalink / raw)
To: gdb-patches
Cc: torbjorn.svensson, yvan.roux, Christophe Lyon, Christophe Lyon
From: Christophe Lyon <christophe.lyon@foss.st.com>
While working on adding support for Non-secure/Secure modes unwinding,
I noticed that the prologue analysis lacked support for vpush, which
is used for instance in the CMSE stub routine.
This patch updates thumb_analyze_prologue accordingly, adding support
for vpush of D-registers.
Signed-off-by: Christophe Lyon <christophe.lyon@foss.st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@arm.com>
---
gdb/arm-tdep.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index d36856e1f3b..9e623057e4a 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -896,6 +896,35 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
regs[bits (insn, 0, 3)] = addr;
}
+ /* vstmdb Rn{!}, { D-registers } (aka vpush). */
+ else if ((insn & 0xff20) == 0xed20
+ && (inst2 & 0x0f00) == 0x0b00
+ && pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
+ {
+ /* Address SP points to. */
+ pv_t addr = regs[bits (insn, 0, 3)];
+
+ /* Number of registers saved. */
+ unsigned int number = bits (inst2, 0, 7) >> 1;
+
+ /* First register to save. */
+ int vd = bits (inst2, 12, 15) | (bits (insn, 6, 6) << 4);
+
+ if (stack.store_would_trash (addr))
+ break;
+
+ /* Calculate offsets of saved registers. */
+ for (; number > 0; number--)
+ {
+ addr = pv_add_constant (addr, -8);
+ stack.store (addr, 8, pv_register (ARM_D0_REGNUM
+ + vd + number, 0));
+ }
+
+ /* Writeback SP to account for the saved registers. */
+ regs[bits (insn, 0, 3)] = addr;
+ }
+
else if ((insn & 0xff50) == 0xe940 /* strd Rt, Rt2,
[Rn, #+/-imm]{!} */
&& pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-04-01 9:19 UTC | newest]
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2022-04-01 9:16 [PATCH v4 0/5] arm: Add support for multiple stacks on Cortex-M Christophe Lyon
2022-04-01 9:16 ` [PATCH v4 1/5] gdb/arm: Fix prologue analysis to support vpush Christophe Lyon
2022-04-01 9:18 [PATCH v4 0/5] arm: Add support for multiple stacks on Cortex-M Christophe Lyon
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