From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.baldwin.cx (bigwig.baldwin.cx [IPv6:2607:f138:0:13::2]) by sourceware.org (Postfix) with ESMTPS id B3EFD3857C48 for ; Tue, 12 Apr 2022 23:48:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B3EFD3857C48 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=FreeBSD.org Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=FreeBSD.org Received: from ralph.com (ralph.baldwin.cx [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id 22EA91A84E2B for ; Tue, 12 Apr 2022 19:48:16 -0400 (EDT) From: John Baldwin To: gdb-patches@sourceware.org Subject: [PATCH v2 14/14] Read the tpidr register from NT_ARM_TLS on Linux. Date: Tue, 12 Apr 2022 16:46:47 -0700 Message-Id: <20220412234647.84595-15-jhb@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220412234647.84595-1-jhb@FreeBSD.org> References: <20220412234647.84595-1-jhb@FreeBSD.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (mail.baldwin.cx [0.0.0.0]); Tue, 12 Apr 2022 19:48:16 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.103.1 at mail.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_STATUS, KHOP_HELO_FCRDNS, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Apr 2022 23:48:17 -0000 XXX: This currently assumes NT_ARM_TLS is always available rather than doing a runtime test. --- gdb/aarch64-linux-nat.c | 56 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 4da274c285a..96ed282410c 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -431,6 +431,48 @@ store_mteregs_to_thread (struct regcache *regcache) perror_with_name (_("unable to store MTE registers.")); } +/* Fill GDB's register array with the TLS register values from + the current thread. */ + +static void +fetch_tlsregs_from_thread (struct regcache *regcache) +{ + uint64_t tpidr = 0; + struct iovec iovec; + + iovec.iov_base = &tpidr; + iovec.iov_len = sizeof (tpidr); + + int tid = get_ptrace_pid (regcache->ptid ()); + if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0) + perror_with_name (_("unable to fetch TLS register.")); + + regcache->raw_supply (AARCH64_TPIDR_REGNUM, &tpidr); +} + +/* Store to the current thread the valid TLS register set in GDB's + register array. */ + +static void +store_tlsregs_to_thread (struct regcache *regcache) +{ + uint64_t tpidr = 0; + + if (REG_VALID != regcache->get_register_status (AARCH64_TPIDR_REGNUM)) + return; + + regcache->raw_collect (AARCH64_TPIDR_REGNUM, (char *) &tpidr); + + struct iovec iovec; + + iovec.iov_base = &tpidr; + iovec.iov_len = sizeof (tpidr); + + int tid = get_ptrace_pid (regcache->ptid ()); + if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0) + perror_with_name (_("unable to store TLS register.")); +} + /* Implement the "fetch_registers" target_ops method. */ void @@ -453,6 +495,9 @@ aarch64_linux_nat_target::fetch_registers (struct regcache *regcache, if (tdep->has_mte ()) fetch_mteregs_from_thread (regcache); + + if (tdep->has_tls ()) + fetch_tlsregs_from_thread (regcache); } else if (regno < AARCH64_V0_REGNUM) fetch_gregs_from_thread (regcache); @@ -472,6 +517,9 @@ aarch64_linux_nat_target::fetch_registers (struct regcache *regcache, if (tdep->has_mte () && (regno == tdep->mte_reg_base)) fetch_mteregs_from_thread (regcache); + + if (tdep->has_tls () && regno == AARCH64_TPIDR_REGNUM) + fetch_tlsregs_from_thread (regcache); } /* Implement the "store_registers" target_ops method. */ @@ -493,6 +541,9 @@ aarch64_linux_nat_target::store_registers (struct regcache *regcache, if (tdep->has_mte ()) store_mteregs_to_thread (regcache); + + if (tdep->has_tls ()) + store_tlsregs_to_thread (regcache); } else if (regno < AARCH64_V0_REGNUM) store_gregs_to_thread (regcache); @@ -505,6 +556,9 @@ aarch64_linux_nat_target::store_registers (struct regcache *regcache, if (tdep->has_mte () && (regno == tdep->mte_reg_base)) store_mteregs_to_thread (regcache); + + if (tdep->has_tls () && regno == AARCH64_TPIDR_REGNUM) + store_tlsregs_to_thread (regcache); } /* Fill register REGNO (if it is a general-purpose register) in @@ -647,7 +701,7 @@ aarch64_linux_nat_target::read_description () bool mte_p = hwcap2 & HWCAP2_MTE; return aarch64_read_description (aarch64_sve_get_vq (tid), pauth_p, mte_p, - false); + true); } /* Convert a native/host siginfo object, into/from the siginfo in the -- 2.34.1