From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id 906DC3857BB1 for ; Tue, 31 May 2022 13:48:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 906DC3857BB1 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24VAunBn030856; Tue, 31 May 2022 15:47:58 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3gbc3da3gq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 May 2022 15:47:58 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 551A4100039; Tue, 31 May 2022 15:47:58 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 478CD22D17F; Tue, 31 May 2022 15:47:58 +0200 (CEST) Received: from gnbcxd0114.gnb.st.com (10.75.127.45) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Tue, 31 May 2022 15:47:55 +0200 Date: Tue, 31 May 2022 15:47:54 +0200 From: Yvan Roux To: , Luis Machado CC: Torbjorn SVENSSON Subject: [PATCH] gdb/arm: Don't use special treatment for PC Message-ID: <20220531134754.GD13232@gnbcxd0114.gnb.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-05-31_06,2022-05-30_03,2022-02-23_01 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 May 2022 13:48:04 -0000 Hi, In an exception frame the PC register is extracted from the stack just like other base registers, so there is no need for a special treatment. Signed-off-by: Torbjörn SVENSSON Signed-off-by: Yvan Roux --- gdb/arm-tdep.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 49664093f00..4ef10ec214d 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -3558,15 +3558,6 @@ arm_m_exception_prev_register (struct frame_info *this_frame, return frame_unwind_got_constant (this_frame, prev_regnum, sp_value); } - if (prev_regnum == ARM_PC_REGNUM) - { - CORE_ADDR lr = frame_unwind_register_unsigned (this_frame, ARM_LR_REGNUM); - struct gdbarch *gdbarch = get_frame_arch (this_frame); - - return frame_unwind_got_constant (this_frame, prev_regnum, - arm_addr_bits_remove (gdbarch, lr)); - } - return trad_frame_get_prev_register (this_frame, cache->saved_regs, prev_regnum); } -- 2.17.1