From: Tom de Vries <tdevries@suse.de>
To: gdb-patches@sourceware.org
Subject: [PATCH][gdb/tdep] Fix gdb.base/large-frame.exp for aarch64
Date: Thu, 4 Aug 2022 15:04:22 +0200 [thread overview]
Message-ID: <20220804130419.GA25032@delia> (raw)
Hi,
On aarch64, I run into:
...
FAIL: gdb.base/large-frame.exp: optimize=-O0: backtrace
...
The problem is that the architecture-specific prologue analyzer fails to
handle the first two insns in the prologue properly:
...
0000000000400610 <func>:
400610: d2880210 mov x16, #0x4010
400614: cb3063ff sub sp, sp, x16
400618: a9007bfd stp x29, x30, [sp]
40061c: 910003fd mov x29, sp
400620: 910043a0 add x0, x29, #0x10
400624: 97fffff0 bl 4005e4 <blah>
...
so we get:
...
$ gdb -q -batch ./outputs/gdb.base/large-frame/large-frame-O0 -ex "b func"
Breakpoint 1 at 0x400614
...
Fix this by:
- fixing the support for the first insn to extract the immediate operand, and
- adding support for the second insn,
such that we have:
...
Breakpoint 1 at 0x400624
...
Note that we're overshooting by one insn (0x400620 is the first insn after the
prologue), but that's a pre-existing problem.
Tested on aarch64-linux.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29408
Any comments?
Thanks,
- Tom
[gdb/tdep] Fix gdb.base/large-frame.exp for aarch64
---
gdb/aarch64-tdep.c | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 8670197a888..f747ebda1ab 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -340,6 +340,20 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch,
if (rn == AARCH64_SP_REGNUM && rd == AARCH64_FP_REGNUM)
seen_stack_set = true;
}
+ else if (inst.opcode->iclass == addsub_ext
+ && strcmp ("sub", inst.opcode->name) == 0)
+ {
+ unsigned rd = inst.operands[0].reg.regno;
+ unsigned rn = inst.operands[1].reg.regno;
+ unsigned rm = inst.operands[2].reg.regno;
+
+ gdb_assert (aarch64_num_of_operands (inst.opcode) == 3);
+ gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd_SP);
+ gdb_assert (inst.operands[1].type == AARCH64_OPND_Rn_SP);
+ gdb_assert (inst.operands[2].type == AARCH64_OPND_Rm_EXT);
+
+ regs[rd] = pv_subtract (regs[rn], regs[rm]);
+ }
else if (inst.opcode->iclass == pcreladdr
&& inst.operands[1].type == AARCH64_OPND_ADDR_ADRP)
{
@@ -370,14 +384,20 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch,
}
else if (inst.opcode->op == OP_MOVZ)
{
+ unsigned rd = inst.operands[0].reg.regno;
+
+ gdb_assert (aarch64_num_of_operands (inst.opcode) == 2);
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd);
+ gdb_assert (inst.operands[1].type == AARCH64_OPND_HALF);
+ gdb_assert (inst.operands[1].shifter.kind == AARCH64_MOD_LSL);
/* If this shows up before we set the stack, keep going. Otherwise
stop the analysis. */
if (seen_stack_set)
break;
- regs[inst.operands[0].reg.regno] = pv_unknown ();
+ regs[rd] = pv_constant (inst.operands[1].imm.value
+ << inst.operands[1].shifter.amount);
}
else if (inst.opcode->iclass == log_shift
&& strcmp (inst.opcode->name, "orr") == 0)
next reply other threads:[~2022-08-04 13:04 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-04 13:04 Tom de Vries [this message]
2022-08-04 13:17 ` Luis Machado
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