From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x336.google.com (mail-ot1-x336.google.com [IPv6:2607:f8b0:4864:20::336]) by sourceware.org (Postfix) with ESMTPS id E03C03858D1E for ; Thu, 8 Sep 2022 06:42:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E03C03858D1E Received: by mail-ot1-x336.google.com with SMTP id w19-20020a9d70d3000000b0065408305f8dso272964otj.5 for ; Wed, 07 Sep 2022 23:42:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=Nr/KlzTUiyQb1MgwH9rOYDNcebGqOokn+Lum3WGHVZQ=; b=3jyBNQfTSXRvJunqj4tbGH0GcfIbUUCuYrfeJbWBfylSZGW/9W81uvmM23+J9+kgjo o68QeZexpC5VlYIuJ3EKsRlWLWqdS0//y1lM8tXd4ygwJie7k2oaVMlaBgunop1fQ3ZF 6quja9G/H6YC9jOyz87cXC3BiykcIVKuQmHWzTVBa5UkUWp26JSBBShc09G8MmMaER1J nhoGa7dcrmCLiGpQLW6MKc6I11UlEp9bJzo5GwPvZ8YxYoIBI8VLqEmIMz8KEMCFl+aJ Y0qQBi81nnazxoX3pjGy3nDBQLMysL3+zyz3xnUcXGTTYjmwoyEC7IissidRQ/9yNiw1 mXZw== X-Gm-Message-State: ACgBeo2GvZUJJPIL43mL4nblEISbnay3aXOfgwX1yEXcQc4l8RpFKYgb m1EUYB00Zur96Uo5k0f9UP/7iutn5MBxBg== X-Google-Smtp-Source: AA6agR51ZYlXCY6HpjVxD/GT128InSbgxOuwofXUtMXGFbSc7RZWF/oZ6mEXf6ZUQUGZHMry1fjeng== X-Received: by 2002:a05:6830:1e69:b0:638:b68c:c64a with SMTP id m9-20020a0568301e6900b00638b68cc64amr2970908otr.84.1662619376174; Wed, 07 Sep 2022 23:42:56 -0700 (PDT) Received: from localhost ([2804:14d:7e39:8470:8eab:4efc:ca3b:b046]) by smtp.gmail.com with ESMTPSA id 105-20020a9d0bf2000000b00638ac7ddb77sm7966045oth.10.2022.09.07.23.42.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 23:42:55 -0700 (PDT) From: Thiago Jung Bauermann To: gdb-patches@sourceware.org Cc: Thiago Jung Bauermann Subject: [PATCH 3/8] gdb, gdbserver/aarch64-linux: Allow aarch64_sve_get_vq to return error Date: Thu, 8 Sep 2022 06:41:46 +0000 Message-Id: <20220908064151.3959930-4-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220908064151.3959930-1-thiago.bauermann@linaro.org> References: <20220908064151.3959930-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Sep 2022 06:42:58 -0000 If ptrace fails, aarch64_sve_get_vq assumes that SVE isn't supported. Because in a subsequent change this function will need to be called from low_new_thread (which can be called whe the inferior thread isn't stopped), it will need to distinguish between ptrace errors due to SVE not being supported from ptrace errors due to the inferior thread not being stopped. This patch changes the function to return -1 in the latter case and adjusts callers. When a caller is allowed to propagate the error, it does so. When that isn't possible an assertion is added to ensure the error isn't missed. --- gdb/aarch64-linux-nat.c | 14 ++++++++++++-- gdb/nat/aarch64-sve-linux-ptrace.c | 18 ++++++++++++------ gdb/nat/aarch64-sve-linux-ptrace.h | 2 +- gdbserver/linux-aarch64-low.cc | 6 +++++- 4 files changed, 30 insertions(+), 10 deletions(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index eda79ec6d35c..633cbc08796c 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -784,8 +784,14 @@ aarch64_linux_nat_target::read_description () CORE_ADDR hwcap = linux_get_hwcap (this); CORE_ADDR hwcap2 = linux_get_hwcap2 (this); + int vq = aarch64_sve_get_vq (tid); + if (vq < 0) + /* A ptrace error happened so we can't determine the vq value. + Give up trying to read a target description. */ + return nullptr; + aarch64_features features; - features.vq = aarch64_sve_get_vq (tid); + features.vq = vq; features.pauth = hwcap & AARCH64_HWCAP_PACA; features.mte = hwcap2 & HWCAP2_MTE; features.tls = true; @@ -894,7 +900,11 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid) /* Only return it if the current vector length matches the one in the tdep. */ aarch64_gdbarch_tdep *tdep = gdbarch_tdep (inf->gdbarch); - uint64_t vq = aarch64_sve_get_vq (ptid.lwp ()); + int vq = aarch64_sve_get_vq (ptid.lwp ()); + + /* If ptrace fails we can't determine vq, but the thread_architecture method + always succeeds so all we can do here is assert that vq is valid. */ + gdb_assert (vq >= 0); if (vq == tdep->vq) return inf->gdbarch; diff --git a/gdb/nat/aarch64-sve-linux-ptrace.c b/gdb/nat/aarch64-sve-linux-ptrace.c index 019d2d65d89a..62f7fc5f56e1 100644 --- a/gdb/nat/aarch64-sve-linux-ptrace.c +++ b/gdb/nat/aarch64-sve-linux-ptrace.c @@ -30,7 +30,7 @@ /* See nat/aarch64-sve-linux-ptrace.h. */ -uint64_t +int aarch64_sve_get_vq (int tid) { struct iovec iovec; @@ -43,13 +43,19 @@ aarch64_sve_get_vq (int tid) 128bit chunks in a Z register. We use VQ because 128bits is the minimum a Z register can increase in size. */ + errno = 0; if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_SVE, &iovec) < 0) { + if (errno == ESRCH) + /* The process isn't stopped. We can't determine SVE support or the + value of vq. */ + return -1; + /* SVE is not supported. */ return 0; } - uint64_t vq = sve_vq_from_vl (header.vl); + int vq = sve_vq_from_vl (header.vl); if (!sve_vl_valid (header.vl)) { @@ -103,10 +109,10 @@ aarch64_sve_set_vq (int tid, struct reg_buffer_common *reg_buf) { /* If vg is not available yet, fetch it from ptrace. The VG value from ptrace is likely the correct one. */ - uint64_t vq = aarch64_sve_get_vq (tid); + int vq = aarch64_sve_get_vq (tid); /* If something went wrong, just bail out. */ - if (vq == 0) + if (vq <= 0) return false; reg_vg = sve_vg_from_vq (vq); @@ -123,9 +129,9 @@ std::unique_ptr aarch64_sve_get_sveregs (int tid) { struct iovec iovec; - uint64_t vq = aarch64_sve_get_vq (tid); + int vq = aarch64_sve_get_vq (tid); - if (vq == 0) + if (vq <= 0) perror_with_name (_("Unable to fetch SVE register header")); /* A ptrace call with NT_ARM_SVE will return a header followed by either a diff --git a/gdb/nat/aarch64-sve-linux-ptrace.h b/gdb/nat/aarch64-sve-linux-ptrace.h index 5c264b395313..90920bc48ef3 100644 --- a/gdb/nat/aarch64-sve-linux-ptrace.h +++ b/gdb/nat/aarch64-sve-linux-ptrace.h @@ -43,7 +43,7 @@ /* Read VQ for the given tid using ptrace. If SVE is not supported then zero is returned (on a system that supports SVE, then VQ cannot be zero). */ -uint64_t aarch64_sve_get_vq (int tid); +int aarch64_sve_get_vq (int tid); /* Set VQ in the kernel for the given tid, using either the value VQ or reading from the register VG in the register buffer. */ diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc index 5d4d667dfa42..576925838f49 100644 --- a/gdbserver/linux-aarch64-low.cc +++ b/gdbserver/linux-aarch64-low.cc @@ -823,8 +823,12 @@ aarch64_target::low_arch_setup () if (is_elf64) { struct aarch64_features features; + int vq = aarch64_sve_get_vq (tid); - features.vq = aarch64_sve_get_vq (tid); + /* If ptrace fails we can't determine vq, but the low_arch_setup method + always succeeds so all we can do here is assert that vq is valid. */ + gdb_assert (vq >= 0); + features.vq = vq; /* A-profile PAC is 64-bit only. */ features.pauth = linux_get_hwcap (current_thread, 8) & AARCH64_HWCAP_PACA; /* A-profile MTE is 64-bit only. */