From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by sourceware.org (Postfix) with ESMTPS id 597B83857BB2 for ; Thu, 8 Sep 2022 06:43:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 597B83857BB2 Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-127dca21a7dso14634553fac.12 for ; Wed, 07 Sep 2022 23:43:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=KlEqGEnpKBS0hsEX2lXHG+Z33O0KAtjQguMH+a2YsyE=; b=KeUBhoG5myOpLv3yV5gglULJ0NypflLXJX/KS5s4CTHN8wv0smVHw1DgnRP28sADHF 2wkoltTJrVaLl6y4HH5h3gJ2QxM8LkVd2t04W+yYpNSMl5f75zfwwygVqQnPYiEMk7Sw d0PkU+pUWjhKsx/qqwtPrutKH4GCXyKlMSQ2Ts+zR3hJJg4mFsl4LafuMjDrYtkMF8JQ C7QHKD63zHAAHl2aRldg5B+0m1rlg6+uPyVKnsKq/Csn3p/Y/3LaUoLG9MFcH6tf/XBZ P4eouUwOqpPbTpX3jloshhxuCE0XX8/8lCm/BhBdnbYGww+PaHRswlRxRPkvUyGtu8jL C2vw== X-Gm-Message-State: ACgBeo1lBwxGxMT/o+Gh22R/IBDh5LPwcq6/ZWd/GmyrHtktBvEvF4yv TzeUW5TTYAbFuXHDQluO+kxVncDv+OBfyw== X-Google-Smtp-Source: AA6agR4MwwzEw0YgbEvk5ScQEQ+zgJr/lZnPd+nbeG3AxI6ToAF2epuacD9NTfQYOXYnKMBJy8lklw== X-Received: by 2002:a05:6870:1697:b0:127:5b5f:51bc with SMTP id j23-20020a056870169700b001275b5f51bcmr1051054oae.192.1662619390053; Wed, 07 Sep 2022 23:43:10 -0700 (PDT) Received: from localhost ([2804:14d:7e39:8470:8eab:4efc:ca3b:b046]) by smtp.gmail.com with ESMTPSA id bk26-20020a056830369a00b00636c81d4109sm8064498otb.46.2022.09.07.23.43.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 23:43:09 -0700 (PDT) From: Thiago Jung Bauermann To: gdb-patches@sourceware.org Cc: Thiago Jung Bauermann Subject: [PATCH 7/8] gdb/aarch64: Factor out most of the thread_architecture method Date: Thu, 8 Sep 2022 06:41:50 +0000 Message-Id: <20220908064151.3959930-8-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220908064151.3959930-1-thiago.bauermann@linaro.org> References: <20220908064151.3959930-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Sep 2022 06:43:12 -0000 The same logic will be used by a subsequent commit when remotely debugging an aarch64-linux target. The code isn't changed, just moved around. --- gdb/aarch64-linux-nat.c | 25 +------------------------ gdb/aarch64-tdep.c | 34 ++++++++++++++++++++++++++++++++++ gdb/aarch64-tdep.h | 2 ++ 3 files changed, 37 insertions(+), 24 deletions(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 633cbc08796c..ff4c69f6af7d 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -891,36 +891,13 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid) inferior *inf = find_inferior_ptid (this, ptid); gdb_assert (inf != NULL); - /* If this is a 32-bit architecture, then this is ARM, not AArch64. - There's no SVE vectors here, so just return the inferior - architecture. */ - if (gdbarch_bfd_arch_info (inf->gdbarch)->bits_per_word == 32) - return inf->gdbarch; - - /* Only return it if the current vector length matches the one in the tdep. */ - aarch64_gdbarch_tdep *tdep - = gdbarch_tdep (inf->gdbarch); int vq = aarch64_sve_get_vq (ptid.lwp ()); /* If ptrace fails we can't determine vq, but the thread_architecture method always succeeds so all we can do here is assert that vq is valid. */ gdb_assert (vq >= 0); - if (vq == tdep->vq) - return inf->gdbarch; - - /* We reach here if the vector length for the thread is different from its - value at process start. Lookup gdbarch via info (potentially creating a - new one) by using a target description that corresponds to the new vq value - and the current architecture features. */ - - const struct target_desc *tdesc = gdbarch_target_desc (inf->gdbarch); - aarch64_features features = aarch64_features_from_target_desc (tdesc); - features.vq = vq; - struct gdbarch_info info; - info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64); - info.target_desc = aarch64_read_description (features); - return gdbarch_find_by_info (info); + return aarch64_update_gdbarch (inf->gdbarch, vq); } /* Implement the "supports_memory_tagging" target_ops method. */ diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 7229b53838e8..18c2b1ec1523 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3420,6 +3420,40 @@ aarch64_cannot_store_register (struct gdbarch *gdbarch, int regnum) || regnum == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base)); } +/* Helper function for the "thread_architecture" target_ops method. + + Returns a new gdbarch that is equivalent to the given gdbarch, but with SVE + registers reflecting the given vq value. */ + +struct gdbarch * +aarch64_update_gdbarch (struct gdbarch *gdbarch, uint64_t vq) +{ + /* If this is a 32-bit architecture, then this is ARM, not AArch64. + There's no SVE vectors here, so just return the inferior + architecture. */ + if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) + return gdbarch; + + /* Only return it if the current vector length matches the one in the tdep. */ + aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + if (vq == tdep->vq) + return gdbarch; + + /* We reach here if the vector length for the thread is different from its + value at process start. Lookup gdbarch via info (potentially creating a + new one) by using a target description that corresponds to the new vq + value and the current architecture features. */ + + const struct target_desc *tdesc = gdbarch_target_desc (gdbarch); + aarch64_features features = aarch64_features_from_target_desc (tdesc); + features.vq = vq; + + struct gdbarch_info info; + info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64); + info.target_desc = aarch64_create_target_description (features); + return gdbarch_find_by_info (info); +} + /* Implement the stack_frame_destroyed_p gdbarch method. */ static int diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index d8513023c376..3d78515e167f 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -139,4 +139,6 @@ void aarch64_displaced_step_fixup (struct gdbarch *gdbarch, bool aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch); +struct gdbarch *aarch64_update_gdbarch (struct gdbarch *gdbarch, uint64_t vq); + #endif /* aarch64-tdep.h */