From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 6F0583959C7A for ; Fri, 16 Sep 2022 11:37:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6F0583959C7A X-IronPort-AV: E=McAfee;i="6500,9779,10471"; a="362936249" X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="362936249" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2022 04:37:55 -0700 X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="686105919" Received: from mulvlfelix.iul.intel.com (HELO localhost) ([172.28.48.92]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2022 04:37:54 -0700 From: Felix Willgerodt To: gdb-patches@sourceware.org, markus.t.metzger@intel.com Subject: [PATCH v6 01/10] btrace: Introduce auxiliary instructions. Date: Fri, 16 Sep 2022 13:36:37 +0200 Message-Id: <20220916113646.49749-2-felix.willgerodt@intel.com> X-Mailer: git-send-email 2.34.3 In-Reply-To: <20220916113646.49749-1-felix.willgerodt@intel.com> References: <20220916113646.49749-1-felix.willgerodt@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Sep 2022 11:38:01 -0000 Auxiliary instructions are pseudo instructions pointing to auxiliary data. This auxiliary data can be printed in all commands displaying (record function-call-history, record instruction-history) or stepping through (stepi etc.) the execution history, which will be introduced in the next commits. This patch is in preparation for the new ptwrite feature, which is based on auxiliary instructions. --- gdb/btrace.c | 2 ++ gdb/btrace.h | 24 +++++++++++++++++++++--- gdb/doc/gdb.texinfo | 4 ++++ 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/gdb/btrace.c b/gdb/btrace.c index c4f0d4911ab..3305ebfb58f 100644 --- a/gdb/btrace.c +++ b/gdb/btrace.c @@ -1823,6 +1823,8 @@ btrace_clear_history (struct btrace_thread_info *btinfo) btinfo->insn_history = NULL; btinfo->call_history = NULL; btinfo->replay = NULL; + + btinfo->aux_data.clear (); } /* Clear the branch trace maintenance histories in BTINFO. */ diff --git a/gdb/btrace.h b/gdb/btrace.h index 0fcf669597a..be4ce424ed5 100644 --- a/gdb/btrace.h +++ b/gdb/btrace.h @@ -52,7 +52,10 @@ enum btrace_insn_class BTRACE_INSN_RETURN, /* The instruction is an unconditional jump. */ - BTRACE_INSN_JUMP + BTRACE_INSN_JUMP, + + /* The instruction is a pseudo instruction containing auxiliary data. */ + BTRACE_INSN_AUX }; /* Instruction flags. */ @@ -68,8 +71,19 @@ DEF_ENUM_FLAGS_TYPE (enum btrace_insn_flag, btrace_insn_flags); This represents a single instruction in a branch trace. */ struct btrace_insn { - /* The address of this instruction. */ - CORE_ADDR pc; + union + { + /* The address of this instruction. Applies to btrace_insn with + iclass == BTRACE_INSN_OTHER or + iclass == BTRACE_INSN_CALL or + iclass == BTRACE_INSN_RETURN or + iclass == BTRACE_INSN_JUMP. */ + CORE_ADDR pc; + + /* Index into btrace_info::aux_data. Applies to btrace_insn with + iclass == BTRACE_INSN_AUX. */ + uint64_t aux_data_index; + }; /* The size of this instruction in bytes. */ gdb_byte size; @@ -330,6 +344,10 @@ struct btrace_thread_info function segment i will be at index (i - 1). */ std::vector functions; + /* Optional auxiliary information that is printed in all commands + displaying or stepping through the execution history. */ + std::vector aux_data; + /* The function level offset. When added to each function's LEVEL, this normalizes the function levels such that the smallest level becomes zero. */ diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 238a49b027d..0f769f5e24c 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -7545,6 +7545,10 @@ Moxie, PowerPC, PowerPC64, S/390, and x86 (i386/amd64) running GNU/Linux. Process record and replay can be used both when native debugging, and when remote debugging via @code{gdbserver}. +When recording an inferior, @value{GDBN} may print additional auxiliary +information during stepping commands and commands displaying the execution +history. + For architecture environments that support process record and replay, @value{GDBN} provides the following commands: -- 2.34.3 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928