From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (woodpecker.gentoo.org [140.211.166.183]) by sourceware.org (Postfix) with ESMTP id 43BE43857692 for ; Tue, 1 Nov 2022 16:26:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 43BE43857692 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org Received: by smtp.gentoo.org (Postfix, from userid 559) id E467F340DB7; Tue, 1 Nov 2022 16:26:56 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH 16/27] sim: pru: invert sim_cpu storage Date: Tue, 1 Nov 2022 20:56:47 +0545 Message-Id: <20221101151158.24916-17-vapier@gentoo.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221101151158.24916-1-vapier@gentoo.org> References: <20221101151158.24916-1-vapier@gentoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,GIT_PATCH_0,JMQ_SPF_NEUTRAL,KAM_DMARC_STATUS,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --- sim/pru/interp.c | 28 ++++++++++++++++++++++++++-- sim/pru/pru.h | 2 +- sim/pru/sim-main.h | 7 +++---- 3 files changed, 30 insertions(+), 7 deletions(-) diff --git a/sim/pru/interp.c b/sim/pru/interp.c index 4b7de4c79ce7..0a4579ac1689 100644 --- a/sim/pru/interp.c +++ b/sim/pru/interp.c @@ -130,6 +130,8 @@ write_regval (uint32_t val, uint32_t *reg, uint32_t regsel) static uint32_t imem_wordaddr_to_byteaddr (SIM_CPU *cpu, uint16_t wa) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + return (((uint32_t) wa << 2) & IMEM_ADDR_MASK) | PC_ADDR_SPACE_MARKER; } @@ -147,6 +149,7 @@ static inline void pru_reg2dmem (SIM_CPU *cpu, uint32_t addr, unsigned int nbytes, int regn, int regb) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); /* GDB assumes unconditional access to all memories, so enable additional checks only in standalone mode. */ bool standalone = (STATE_OPEN_KIND (CPU_STATE (cpu)) == SIM_OPEN_STANDALONE); @@ -196,6 +199,7 @@ static inline void pru_dmem2reg (SIM_CPU *cpu, uint32_t addr, unsigned int nbytes, int regn, int regb) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); /* GDB assumes unconditional access to all memories, so enable additional checks only in standalone mode. */ bool standalone = (STATE_OPEN_KIND (CPU_STATE (cpu)) == SIM_OPEN_STANDALONE); @@ -247,6 +251,7 @@ pru_dmem2reg (SIM_CPU *cpu, uint32_t addr, unsigned int nbytes, static void set_initial_gprs (SIM_CPU *cpu) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); int i; /* Set up machine just out of reset. */ @@ -325,6 +330,8 @@ static void pru_sim_xin_mac (SIM_DESC sd, SIM_CPU *cpu, unsigned int rd_regn, unsigned int rdb, unsigned int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + if (rd_regn < 25 || (rd_regn * 4 + rdb + length) > (27 + 1) * 4) sim_io_error (sd, "XIN MAC: invalid transfer regn=%u.%u, length=%u\n", rd_regn, rdb, length); @@ -348,6 +355,8 @@ static void pru_sim_xin (SIM_DESC sd, SIM_CPU *cpu, unsigned int wba, unsigned int rd_regn, unsigned int rdb, unsigned int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + if (wba == 0) { pru_sim_xin_mac (sd, cpu, rd_regn, rdb, length); @@ -393,6 +402,7 @@ static void pru_sim_xout_mac (SIM_DESC sd, SIM_CPU *cpu, unsigned int rd_regn, unsigned int rdb, unsigned int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); const int modereg_accessed = (rd_regn == 25); /* Multiple Accumulate. */ @@ -453,6 +463,8 @@ static void pru_sim_xout (SIM_DESC sd, SIM_CPU *cpu, unsigned int wba, unsigned int rd_regn, unsigned int rdb, unsigned int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + if (wba == 0) { pru_sim_xout_mac (sd, cpu, rd_regn, rdb, length); @@ -482,6 +494,8 @@ static void pru_sim_xchg (SIM_DESC sd, SIM_CPU *cpu, unsigned int wba, unsigned int rd_regn, unsigned int rdb, unsigned int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + if (wba == XFRID_SCRATCH_BANK_0 || wba == XFRID_SCRATCH_BANK_1 || wba == XFRID_SCRATCH_BANK_2 || wba == XFRID_SCRATCH_BANK_PEER) { @@ -508,6 +522,7 @@ pru_sim_xchg (SIM_DESC sd, SIM_CPU *cpu, unsigned int wba, static void pru_sim_syscall (SIM_DESC sd, SIM_CPU *cpu) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); /* If someday TI confirms that the "reserved" HALT opcode fields can be used for extra arguments, then maybe we can embed the syscall number there. Until then, let's use R1. */ @@ -525,6 +540,7 @@ static void sim_step_once (SIM_DESC sd) { SIM_CPU *cpu = STATE_CPU (sd, 0); + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); const struct pru_opcode *op; uint32_t inst; uint32_t _RDVAL, OP2; /* intermediate values. */ @@ -635,16 +651,20 @@ sim_engine_run (SIM_DESC sd, static sim_cia pru_pc_get (sim_cpu *cpu) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + /* Present PC as byte address. */ - return imem_wordaddr_to_byteaddr (cpu, cpu->pru_cpu.pc); + return imem_wordaddr_to_byteaddr (cpu, pru_cpu->pc); } /* Implement callback for standard CPU_PC_STORE routine. */ static void pru_pc_set (sim_cpu *cpu, sim_cia pc) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + /* PC given as byte address. */ - cpu->pru_cpu.pc = imem_byteaddr_to_wordaddr (cpu, pc); + pru_cpu->pc = imem_byteaddr_to_wordaddr (cpu, pc); } @@ -652,6 +672,8 @@ pru_pc_set (sim_cpu *cpu, sim_cia pc) static int pru_store_register (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); + if (rn < NUM_REGS && rn >= 0) { if (length == 4) @@ -675,6 +697,7 @@ pru_store_register (SIM_CPU *cpu, int rn, const unsigned char *memory, int lengt static int pru_fetch_register (SIM_CPU *cpu, int rn, unsigned char *memory, int length) { + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); long ival; if (rn < NUM_REGS && rn >= 0) @@ -831,6 +854,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char * const *argv, char * const *env) { SIM_CPU *cpu = STATE_CPU (sd, 0); + struct pru_regset *pru_cpu = PRU_SIM_CPU (cpu); host_callback *cb = STATE_CALLBACK (sd); SIM_ADDR addr; diff --git a/sim/pru/pru.h b/sim/pru/pru.h index df61538491aa..f6b633b29bd0 100644 --- a/sim/pru/pru.h +++ b/sim/pru/pru.h @@ -41,7 +41,7 @@ #define XFRID_SCRATCH_BANK_PEER 14 #define XFRID_MAX 255 -#define CPU (cpu->pru_cpu) +#define CPU (*pru_cpu) #define PC (CPU.pc) #define PC_byteaddr ((PC << 2) | PC_ADDR_SPACE_MARKER) diff --git a/sim/pru/sim-main.h b/sim/pru/sim-main.h index ce3453656380..a217eee576a1 100644 --- a/sim/pru/sim-main.h +++ b/sim/pru/sim-main.h @@ -19,6 +19,8 @@ #ifndef PRU_SIM_MAIN #define PRU_SIM_MAIN +#define SIM_HAVE_COMMON_SIM_CPU + #include #include #include "pru.h" @@ -78,9 +80,6 @@ struct pru_regset int insts; }; -struct _sim_cpu { - struct pru_regset pru_cpu; - sim_cpu_base base; -}; +#define PRU_SIM_CPU(cpu) ((struct pru_regset *) CPU_ARCH_DATA (cpu)) #endif /* PRU_SIM_MAIN */ -- 2.37.3