From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (dev.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 69A4B3861018 for ; Fri, 23 Dec 2022 06:07:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 69A4B3861018 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org Received: by smtp.gentoo.org (Postfix, from userid 559) id 1D98C3411D8; Fri, 23 Dec 2022 06:07:44 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH 12/20] sim: microblaze: move arch-specific settings to internal header Date: Fri, 23 Dec 2022 01:07:05 -0500 Message-Id: <20221223060713.28821-13-vapier@gentoo.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221223060713.28821-1-vapier@gentoo.org> References: <20221223060713.28821-1-vapier@gentoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00,GIT_PATCH_0,JMQ_SPF_NEUTRAL,KAM_DMARC_STATUS,KAM_SHORT,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so move it all out to a new header which only this port will include. --- sim/microblaze/interp.c | 1 + sim/microblaze/microblaze-sim.h | 46 +++++++++++++++++++++++++++++++++ sim/microblaze/sim-main.h | 24 ----------------- 3 files changed, 47 insertions(+), 24 deletions(-) create mode 100644 sim/microblaze/microblaze-sim.h diff --git a/sim/microblaze/interp.c b/sim/microblaze/interp.c index 3d7fde0af3e3..8a8cb9f2b832 100644 --- a/sim/microblaze/interp.c +++ b/sim/microblaze/interp.c @@ -33,6 +33,7 @@ #include "sim-signal.h" #include "sim-syscall.h" +#include "microblaze-sim.h" #include "microblaze-dis.h" #define target_big_endian (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) diff --git a/sim/microblaze/microblaze-sim.h b/sim/microblaze/microblaze-sim.h new file mode 100644 index 000000000000..9e5fb0711c58 --- /dev/null +++ b/sim/microblaze/microblaze-sim.h @@ -0,0 +1,46 @@ +/* Copyright 2009-2022 Free Software Foundation, Inc. + + This file is part of the Xilinx MicroBlaze simulator. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see . */ + +#ifndef MICROBLAZE_SIM_H +#define MICROBLAZE_SIM_H + +#include "microblaze.h" + +/* The machine state. + This state is maintained in host byte order. The + fetch/store register functions must translate between host + byte order and the target processor byte order. + Keeping this data in target byte order simplifies the register + read/write functions. Keeping this data in native order improves + the performance of the simulator. Simulation speed is deemed more + important. */ + +/* The ordering of the microblaze_regset structure is matched in the + gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro. */ + struct microblaze_regset +{ + signed_4 regs[32]; /* primary registers */ + signed_4 spregs[2]; /* pc + msr */ + int cycles; + int insts; + unsigned_1 imm_enable; + signed_2 imm_high; +}; + +#define MICROBLAZE_SIM_CPU(cpu) ((struct microblaze_regset *) CPU_ARCH_DATA (cpu)) + +#endif /* MICROBLAZE_SIM_H */ diff --git a/sim/microblaze/sim-main.h b/sim/microblaze/sim-main.h index 160f10156fff..7646dad044fe 100644 --- a/sim/microblaze/sim-main.h +++ b/sim/microblaze/sim-main.h @@ -18,31 +18,7 @@ #ifndef MICROBLAZE_SIM_MAIN #define MICROBLAZE_SIM_MAIN -#include "microblaze.h" #include "sim-basics.h" #include "sim-base.h" -/* The machine state. - This state is maintained in host byte order. The - fetch/store register functions must translate between host - byte order and the target processor byte order. - Keeping this data in target byte order simplifies the register - read/write functions. Keeping this data in native order improves - the performance of the simulator. Simulation speed is deemed more - important. */ - -/* The ordering of the microblaze_regset structure is matched in the - gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro. */ - struct microblaze_regset -{ - signed_4 regs[32]; /* primary registers */ - signed_4 spregs[2]; /* pc + msr */ - int cycles; - int insts; - unsigned_1 imm_enable; - signed_2 imm_high; -}; - -#define MICROBLAZE_SIM_CPU(cpu) ((struct microblaze_regset *) CPU_ARCH_DATA (cpu)) - #endif /* MICROBLAZE_SIM_MAIN */ -- 2.39.0