From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (woodpecker.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id A779F3858D35 for ; Sun, 25 Dec 2022 19:29:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A779F3858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org Received: by smtp.gentoo.org (Postfix, from userid 559) id 49BF73410CC; Sun, 25 Dec 2022 19:29:38 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH 2/8] sim: mips: unify itable generation (a bit) Date: Sun, 25 Dec 2022 14:28:46 -0500 Message-Id: <20221225192852.1940-2-vapier@gentoo.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221225192852.1940-1-vapier@gentoo.org> References: <20221225072831.18760-1-vapier@gentoo.org> <20221225192852.1940-1-vapier@gentoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,JMQ_SPF_NEUTRAL,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The m16 & multi targets generate itable once even when all the other modules are generated multiple times. The default igen target will generate itable with everything else out of convenience. This means flags are passed which don't affect the generated itable there. We can unify the itable generation by making sure the right -F/-M filter variables are passed down. Since there's already a dedicated rule & variable in the multi build mode, generalize that and switch the m16 & igen builds over too. I spent a lot of time staring at this code, building for diff mips targets, and exploring all the shell code paths. I think this is safe, but only time (and users) will really tell. --- sim/configure | 4 ++++ sim/mips/Makefile.in | 54 ++++++++++++++++--------------------------- sim/mips/acinclude.m4 | 2 ++ 3 files changed, 26 insertions(+), 34 deletions(-) diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index 3861e4e50779..4cd596421190 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -92,7 +92,7 @@ IGEN_INCLUDE=\ # NB: Since these can be built by a number of generators, care # must be taken to ensure that they are only dependant on # one of those generators. -BUILT_SRC_FROM_GEN = \ +BUILT_SRC_FROM_IGEN_ITABLE = \ itable.h \ itable.c \ @@ -100,8 +100,24 @@ SIM_IGEN_ALL = tmp-igen SIM_M16_ALL = tmp-m16 SIM_MULTI_ALL = tmp-multi -$(BUILT_SRC_FROM_GEN): $(SIM_$(SIM_MIPS_GEN)_ALL) +$(BUILT_SRC_FROM_IGEN_ITABLE): tmp-itable +tmp-itable: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) + $(ECHO_IGEN) $(IGEN_RUN) \ + $(IGEN_TRACE) \ + -I $(srcdir) \ + -Werror \ + -Wnodiscard \ + -Wnowidth \ + -Wnounimplemented \ + $(SIM_MIPS_IGEN_ITABLE_FLAGS) \ + -G gen-direct-access \ + -G gen-zero-r0 \ + -i $(IGEN_INSN) \ + -n itable.h -ht itable.h \ + -n itable.c -t itable.c \ + # + $(SILENCE) touch $@ BUILT_SRC_FROM_IGEN = \ @@ -145,8 +161,6 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) -n model.c -m model.c \ -n support.h -hf support.h \ -n support.c -f support.c \ - -n itable.h -ht itable.h \ - -n itable.c -t itable.c \ -n engine.h -he engine.h \ -n engine.c -e engine.c \ -n irun.c -r irun.c @@ -228,25 +242,12 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) -n m32_support.h -hf m32_support.h \ -n m32_support.c -f m32_support.c \ # - $(ECHO_IGEN) $(IGEN_RUN) \ - $(IGEN_TRACE) \ - -I $(srcdir) \ - -Werror \ - -Wnodiscard \ - -Wnowidth \ - $(SIM_MIPS_IGEN_FLAGS) $(SIM_MIPS_M16_FLAGS) \ - -G gen-direct-access \ - -G gen-zero-r0 \ - -i $(IGEN_INSN) \ - -n itable.h -ht itable.h \ - -n itable.c -t itable.c \ - # $(SILENCE) touch $@ BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC) $(BUILT_SRC_FROM_MULTI): tmp-multi -tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi +tmp-multi: tmp-mach-multi tmp-run-multi tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \ p=`echo $${t} | sed -e 's/:.*//'` ; \ @@ -292,21 +293,6 @@ tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) || exit; \ done $(SILENCE) touch $@ -tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) - $(ECHO_IGEN) $(IGEN_RUN) \ - $(IGEN_TRACE) \ - -I $(srcdir) \ - -Werror \ - -Wnodiscard \ - -Wnowidth \ - $(SIM_MIPS_IGEN_ITABLE_FLAGS) \ - -G gen-direct-access \ - -G gen-zero-r0 \ - -i $(IGEN_INSN) \ - -n itable.h -ht itable.h \ - -n itable.c -t itable.c \ - # - $(SILENCE) touch $@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \ case $${t} in \ @@ -347,7 +333,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c $(SILENCE) touch $@ clean-extra: - rm -f $(BUILT_SRC_FROM_GEN) + rm -f $(BUILT_SRC_FROM_IGEN_ITABLE) rm -f $(BUILT_SRC_FROM_IGEN) rm -f $(BUILT_SRC_FROM_M16) rm -f $(BUILT_SRC_FROM_MULTI) diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4 index 116dc1e6141b..452dfc84514f 100644 --- a/sim/mips/acinclude.m4 +++ b/sim/mips/acinclude.m4 @@ -321,6 +321,8 @@ __EOF__ ], [dnl dnl For clean-extra target. SIM_MIPS_MULTI_SRC=doesnt-exist.c + SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_IGEN_FLAGS)' + AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])]) ]) SIM_MIPS_IGEN_FLAGS="-F ${sim_mips_igen_filter} ${sim_mips_igen_machine}" SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}" -- 2.39.0