From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (dev.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id CB5BD3858C2B for ; Sun, 25 Dec 2022 19:29:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CB5BD3858C2B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org Received: by smtp.gentoo.org (Postfix, from userid 559) id 7F0663410C4; Sun, 25 Dec 2022 19:29:42 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH 4/8] sim: mips: rename "igen" generation mode to "single" Date: Sun, 25 Dec 2022 14:28:48 -0500 Message-Id: <20221225192852.1940-4-vapier@gentoo.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221225192852.1940-1-vapier@gentoo.org> References: <20221225072831.18760-1-vapier@gentoo.org> <20221225192852.1940-1-vapier@gentoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,JMQ_SPF_NEUTRAL,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP,UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The naming in here has grown organically and is confusing to follow. Originally there was only one set of rules for generating code from the igen sources, so calling it "tmp-igen" and such made sense. But when other multigen modes were added ("m16" & "multi") which also used igen, it's not clear what's common igen and what's specific to this generation mode. So rename the set of rules from "igen" to "single" so it's easier to follow. --- sim/Makefile.in | 2 +- sim/configure | 50 +++++++++++++++++++++---------------------- sim/mips/Makefile.in | 18 ++++++++-------- sim/mips/acinclude.m4 | 50 +++++++++++++++++++++---------------------- 4 files changed, 60 insertions(+), 60 deletions(-) diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index 187f574f2496..d9b489858c54 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -3,7 +3,7 @@ ## COMMON_PRE_CONFIG_FRAG -SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@ +SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@ SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@ SIM_MIPS_GEN = @SIM_MIPS_GEN@ SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@ @@ -15,7 +15,7 @@ arch = mips # Object files created by various simulator generators. -SIM_IGEN_OBJ = \ +SIM_SINGLE_OBJ = \ support.o \ itable.o \ semantics.o \ @@ -86,11 +86,11 @@ IGEN_INCLUDE=\ $(srcdir)/mips3264r2.igen \ $(srcdir)/mips3264r6.igen \ -SIM_IGEN_ALL = tmp-igen +SIM_SINGLE_ALL = tmp-single SIM_M16_ALL = tmp-m16 SIM_MULTI_ALL = tmp-multi -BUILT_SRC_FROM_IGEN = \ +BUILT_SRC_FROM_SINGLE = \ icache.h \ icache.c \ idecode.h \ @@ -105,15 +105,15 @@ BUILT_SRC_FROM_IGEN = \ engine.c \ irun.c \ -$(BUILT_SRC_FROM_IGEN): tmp-igen +$(BUILT_SRC_FROM_SINGLE): tmp-single -tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) +tmp-single: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) $(ECHO_IGEN) $(IGEN_RUN) \ $(IGEN_TRACE) \ -I $(srcdir) \ -Werror \ -Wnodiscard \ - $(SIM_MIPS_IGEN_FLAGS) \ + $(SIM_MIPS_SINGLE_FLAGS) \ -G gen-direct-access \ -G gen-zero-r0 \ -B 32 \ @@ -192,7 +192,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) -I $(srcdir) \ -Werror \ -Wnodiscard \ - $(SIM_MIPS_IGEN_FLAGS) \ + $(SIM_MIPS_SINGLE_FLAGS) \ -G gen-direct-access \ -G gen-zero-r0 \ -B 32 \ @@ -303,7 +303,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c $(SILENCE) touch $@ clean-extra: - rm -f $(BUILT_SRC_FROM_IGEN) + rm -f $(BUILT_SRC_FROM_SINGLE) rm -f $(BUILT_SRC_FROM_M16) rm -f $(BUILT_SRC_FROM_MULTI) rm -f tmp-* diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4 index 452dfc84514f..111dd87618e3 100644 --- a/sim/mips/acinclude.m4 +++ b/sim/mips/acinclude.m4 @@ -59,19 +59,19 @@ AC_MSG_RESULT([$SIM_MIPS_FPU_BITSIZE]) AC_SUBST(SIM_MIPS_FPU_BITSIZE) dnl Select the IGEN architecture. -SIM_MIPS_GEN=IGEN -sim_mips_igen_machine="-M mipsIV" +SIM_MIPS_GEN=SINGLE +sim_mips_single_machine="-M mipsIV" sim_mips_m16_machine="-M mips16,mipsIII" -sim_mips_igen_filter="32,64,f" +sim_mips_single_filter="32,64,f" sim_mips_m16_filter="16" AS_CASE([${target}], [mips*tx39*], [dnl - SIM_MIPS_GEN=IGEN - sim_mips_igen_filter="32,f" - sim_mips_igen_machine="-M r3900"], + SIM_MIPS_GEN=SINGLE + sim_mips_single_filter="32,f" + sim_mips_single_machine="-M r3900"], [mips64vr41*], [dnl SIM_MIPS_GEN=M16 - sim_mips_igen_machine="-M vr4100" + sim_mips_single_machine="-M vr4100" sim_mips_m16_machine="-M vr4100"], [mips64*], [dnl SIM_MIPS_GEN=MULTI @@ -98,36 +98,36 @@ AS_CASE([${target}], mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2" sim_mips_multi_default=mipsisa32r2], [mipsisa32r6*], [dnl - SIM_MIPS_GEN=IGEN - sim_mips_igen_machine="-M mips32r6" - sim_mips_igen_filter="32,f"], + SIM_MIPS_GEN=SINGLE + sim_mips_single_machine="-M mips32r6" + sim_mips_single_filter="32,f"], [mipsisa32*], [dnl SIM_MIPS_GEN=M16 - sim_mips_igen_machine="-M mips32,mips16,mips16e,smartmips" + sim_mips_single_machine="-M mips32,mips16,mips16e,smartmips" sim_mips_m16_machine="-M mips16,mips16e,mips32" - sim_mips_igen_filter="32,f"], + sim_mips_single_filter="32,f"], [mipsisa64r2*], [dnl SIM_MIPS_GEN=M16 - sim_mips_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2" + sim_mips_single_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2" sim_mips_m16_machine="-M mips16,mips16e,mips64r2"], [mipsisa64r6*], [dnl - SIM_MIPS_GEN=IGEN - sim_mips_igen_machine="-M mips64r6"], + SIM_MIPS_GEN=SINGLE + sim_mips_single_machine="-M mips64r6"], [mipsisa64sb1*], [dnl - SIM_MIPS_GEN=IGEN - sim_mips_igen_machine="-M mips64,mips3d,sb1"], + SIM_MIPS_GEN=SINGLE + sim_mips_single_machine="-M mips64,mips3d,sb1"], [mipsisa64*], [dnl SIM_MIPS_GEN=M16 - sim_mips_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx" + sim_mips_single_machine="-M mips64,mips3d,mips16,mips16e,mdmx" sim_mips_m16_machine="-M mips16,mips16e,mips64"], [mips*lsi*], [dnl SIM_MIPS_GEN=M16 - sim_mips_igen_machine="-M mipsIII,mips16" + sim_mips_single_machine="-M mipsIII,mips16" sim_mips_m16_machine="-M mips16,mipsIII" - sim_mips_igen_filter="32,f"], + sim_mips_single_filter="32,f"], [mips*], [dnl - SIM_MIPS_GEN=IGEN - sim_mips_igen_filter="32,f"]) + SIM_MIPS_GEN=SINGLE + sim_mips_single_filter="32,f"]) dnl The MULTI generator can combine several simulation engines into one. dnl executable. A configuration which uses the MULTI should set two @@ -321,12 +321,12 @@ __EOF__ ], [dnl dnl For clean-extra target. SIM_MIPS_MULTI_SRC=doesnt-exist.c - SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_IGEN_FLAGS)' + SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_SINGLE_FLAGS)' AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])]) ]) -SIM_MIPS_IGEN_FLAGS="-F ${sim_mips_igen_filter} ${sim_mips_igen_machine}" +SIM_MIPS_SINGLE_FLAGS="-F ${sim_mips_single_filter} ${sim_mips_single_machine}" SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}" -AC_SUBST(SIM_MIPS_IGEN_FLAGS) +AC_SUBST(SIM_MIPS_SINGLE_FLAGS) AC_SUBST(SIM_MIPS_M16_FLAGS) AC_SUBST(SIM_MIPS_GEN) AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS) -- 2.39.0