From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by sourceware.org (Postfix) with ESMTPS id 8CC7C38582B0 for ; Tue, 21 Mar 2023 15:46:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8CC7C38582B0 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679413607; x=1710949607; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Of4VS4Aoje8iBJE/a7WwABTBosehIRNPX3/4gZzWR0o=; b=SH5mE6ex6eHAqL/nrnRPvb3bVe6Ij25MeEHDPs+zssjsz6WXwbBqFMFC pbUp7HPKR4yti4bb2g9a0aDl/JJNNV5kUeA06H7yVQ0ah2iKI339BY7CW YCwmlYvj0jpKjOlBV/I/i/mo1ak/xGsoFAxhprg/uTzKYaq8bNxgxzoy/ VhjixmZo+OMTufHzzH3XWbkfphWLPU/+XApk0FFgvoxt8jv1pTVyMXu4B r/h+Hd4eP6k9lrGStHJgvPPD3jjGPwRuVU+0cfAW185QiM3a9rOeUkKZm X0zP6RYwx8d6VYat8hWFTmxwRzmUx2OwBTVRUoQguLX/2nIGS5gQ5xrL6 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="366709378" X-IronPort-AV: E=Sophos;i="5.98,279,1673942400"; d="scan'208";a="366709378" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2023 08:46:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="792149356" X-IronPort-AV: E=Sophos;i="5.98,279,1673942400"; d="scan'208";a="792149356" Received: from mulfelix.iul.intel.com (HELO localhost) ([172.28.49.163]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2023 08:46:46 -0700 From: Felix Willgerodt To: gdb-patches@sourceware.org Cc: Felix Willgerodt Subject: [PATCH v8 02/10] btrace: Enable auxiliary instructions in record instruction-history. Date: Tue, 21 Mar 2023 16:46:18 +0100 Message-Id: <20230321154626.448816-3-felix.willgerodt@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230321154626.448816-1-felix.willgerodt@intel.com> References: <20230321154626.448816-1-felix.willgerodt@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Print the auxiliary data when a btrace_insn of type BTRACE_INSN_AUX is encountered in the instruction-history. Printing is active by default, it can be silenced with the /a modifier. This patch is in preparation for the new ptwrite feature, which is based on auxiliary instructions. --- gdb/disasm-flags.h | 1 + gdb/doc/gdb.texinfo | 3 +++ gdb/record-btrace.c | 14 ++++++++++++++ gdb/record.c | 5 +++++ 4 files changed, 23 insertions(+) diff --git a/gdb/disasm-flags.h b/gdb/disasm-flags.h index e2e8a7a82e5..08b2d506493 100644 --- a/gdb/disasm-flags.h +++ b/gdb/disasm-flags.h @@ -34,6 +34,7 @@ enum gdb_disassembly_flag : unsigned DISASSEMBLY_SOURCE = (0x1 << 5), DISASSEMBLY_SPECULATIVE = (0x1 << 6), DISASSEMBLY_RAW_BYTES = (0x1 << 7), + DISASSEMBLY_OMIT_AUX_INSN = (0x1 << 8), }; DEF_ENUM_FLAGS_TYPE (enum gdb_disassembly_flag, gdb_disassembly_flags); diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index d1690c07a99..a3ca25577c4 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -8057,6 +8057,9 @@ To better align the printed instructions when the trace contains instructions from more than one function, the function name may be omitted by specifying the @code{/f} modifier. +Printing auxiliary information is enabled by default and can be +omitted with the @code{/a} modifier. + Speculatively executed instructions are prefixed with @samp{?}. This feature is not available for all recording formats. diff --git a/gdb/record-btrace.c b/gdb/record-btrace.c index 2d88e4d20bf..e69004b35b5 100644 --- a/gdb/record-btrace.c +++ b/gdb/record-btrace.c @@ -826,6 +826,20 @@ btrace_insn_history (struct ui_out *uiout, btrace_ui_out_decode_error (uiout, btrace_insn_get_error (&it), conf->format); } + else if (insn->iclass == BTRACE_INSN_AUX) + { + if ((flags & DISASSEMBLY_OMIT_AUX_INSN) != 0) + continue; + + uiout->field_fmt ("insn-number", "%u", btrace_insn_number (&it)); + uiout->text ("\t"); + uiout->spaces (3); + uiout->text ("["); + uiout->field_fmt ("aux-data", "%s", + it.btinfo->aux_data.at + (insn->aux_data_index).c_str ()); + uiout->text ("]\n"); + } else { struct disasm_insn dinsn; diff --git a/gdb/record.c b/gdb/record.c index f7c95153537..c7397858717 100644 --- a/gdb/record.c +++ b/gdb/record.c @@ -486,6 +486,9 @@ get_insn_history_modifiers (const char **arg) switch (*args) { + case 'a': + modifiers |= DISASSEMBLY_OMIT_AUX_INSN; + break; case 'm': case 's': modifiers |= DISASSEMBLY_SOURCE; @@ -856,6 +859,8 @@ With a /m or /s modifier, source lines are included (if available).\n\ With a /r modifier, raw instructions in hex are included.\n\ With a /f modifier, function names are omitted.\n\ With a /p modifier, current position markers are omitted.\n\ +With a /a modifier, omits output of auxiliary data, which is enabled \ +by default.\n\ With no argument, disassembles ten more instructions after the previous \ disassembly.\n\ \"record instruction-history -\" disassembles ten instructions before a \ -- 2.39.2 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928