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Tue, 11 Apr 2023 04:27:03 +0000 From: Luis Machado To: Subject: [PATCH 04/17] [gdb/aarch64] sve: Fix return command when using V registers in a SVE-enabled target Date: Tue, 11 Apr 2023 05:26:45 +0100 Message-ID: <20230411042658.1852730-5-luis.machado@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230411042658.1852730-1-luis.machado@arm.com> References: <20230411042658.1852730-1-luis.machado@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT046:EE_|VI1PR08MB5439:EE_|DBAEUR03FT012:EE_|DBBPR08MB6059:EE_ X-MS-Office365-Filtering-Correlation-Id: 1570db84-9295-4853-0388-08db3a450704 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: i2zL1NWoWj+sDJbIge5XxtFMl7clrly0SiOT9murXDVIvw6nULa4Wqtl0Zh3WZy/Iw0k3lOrSdwhwa+rdPYtSL8bUI/+F5iTBe1edpJsXLECdGmzKbjw3HWaKk/mY+5D4+8CavQtj/yvuiOQq+2gTalBGhVdV/LFIrWGrmbQQ637atI3s9HLDiYnbi94SD9GxBkxZ6Np7v+NjIprCSFc2IXP531t4WgSK3uLiUW4E/SUdbK0Y4zkRqj1Fh7VTj/6NikB0T4uy4r0FHfyEST3/yswZd3SldWMRLC5m9T0j9OS14zd/xx3DtUyz2/quHHvCdTB7gBPrVxeNwXf6+Mqv/QGly7eKdanrj9uRkBh0M5c8hFnSaLRf5I2uXqVObFnjwaPxLfTuxVGmFK85Z9sxMaiKoFDAclHD5f5q4Ki7aqcHb0vr2sOQy+J+DNNg5UulpWcZ416UqWhLwjJM6x3dKQn7xWL0VZs7mbr8IQiBS8Wa5soivNuyBaQG7JWiaiVe7ONy+SUC608PkFp/0e0ykh2WwfPxRAKcbZpUzS6bNHclKJt1RxUc4lKpPWVQiYogaX8b+UTfPfuJS2Uwcy0SG5lKcjZyQE84b2uZtSDj4Tct4a1MyQqDmSf2z+WPV3v14rQ7i2XBfWi42+yqO2xU1HIq9Jc5R9aNxyEiQpw/yZE9lRUB6iUBAOIJ2IwkBJZWSnpAfHFo+Qe8XaUI+5q1g== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(396003)(376002)(39850400004)(136003)(451199021)(46966006)(36840700001)(7696005)(478600001)(1076003)(316002)(26005)(44832011)(186003)(6666004)(2906002)(5660300002)(70206006)(70586007)(41300700001)(8676002)(6916009)(82310400005)(8936002)(81166007)(356005)(82740400003)(40480700001)(86362001)(83380400001)(36756003)(47076005)(2616005)(426003)(36860700001)(336012)(36900700001);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Apr 2023 04:27:14.7915 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1570db84-9295-4853-0388-08db3a450704 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6059 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: In a target without SVE support, the V registers have a size of 16 bytes, otherwise they may have a size bigger than 16 bytes (depending on the current vector length for the Z registers, as they overlap the V registers). In aarch64-tdep.c:aarch64_store_return_value, the code is laid out in a way that allocates the buffer with the size of the register, but only updates the amount of bytes for the particular type we're returning. This may cause a situation where we have a register size of 32 bytes but are returning a floating point value of 8 bytes. The temporary buffer will therefore have 32 bytes, but we'll only update 8 bytes of it. When we write the entire register back, it will have potentially 24 bytes of garbage in it. Fix this by first reading the original contents of the register and then overriding only the bytes that we need for the return value. Tested on aarch64-linux Ubuntu 22.04/20.04. --- gdb/aarch64-tdep.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index d8349e4ccdb..ea0d8ce2e27 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -2411,6 +2411,11 @@ aarch64_store_return_value (struct type *type, struct regcache *regs, ("write HFA or HVA return value element %d to %s", i + 1, gdbarch_register_name (gdbarch, regno)); + /* Depending on whether the target supports SVE or not, the V + registers may report a size > 16 bytes. In that case, read the + original contents of the register before overriding it with a new + value that has a potential size <= 16 bytes. */ + regs->cooked_read (regno, tmpbuf); memcpy (tmpbuf, valbuf, len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len); regs->cooked_write (regno, tmpbuf); -- 2.25.1