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Wed, 7 Jun 2023 09:40:16 +0000 From: Luis Machado To: CC: Subject: [PATCH] Fix PR30369 regression on aarch64/arm (PR30506) Date: Wed, 7 Jun 2023 10:40:10 +0100 Message-ID: <20230607094010.57892-1-luis.machado@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT032:EE_|AS4PR08MB8023:EE_|AM7EUR03FT052:EE_|DBBPR08MB6284:EE_ X-MS-Office365-Filtering-Correlation-Id: eb34c78a-0f8e-4210-ba3d-08db673b38bc x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: V1PFZUnHtvyJ4B40Bth07dxHRD26trTSLIal8jh7vm4TzLC5DFa85MAzUPCqF6HA4DdEVVmAKojkQKybTF+cYcTtVJNbzUwxf28sUX9tu6n5ejFc55gLFBBvZP41PpnAlru0k6u1TIMJRMmMcXKFEw/tySw2h2drW2+LNcuX9nKosvou+qHv5vO3WBgf9O879QCowWwjD1d7n3WTd61RIUR3T+cqGmEdkThizZXaQBgQCqnOcoLRyDs6aBSGOifexFfZZ9GojPIso+BUoWxlOtlwDMBVg29uCyfHzcriTw/CB7Sg1lvmC27QNNwxF15YTWihO9lCT/0ZCXJe5VZO+pB1cMEJhaYA6ywfXpRYNkDX8lL6vREOac7yLYjF9iAe1gGlhMjo8iuw4EfhfPKNssnhXHMIK4Wi+GqJwhMv7ZY92A7R1ohV4GIVkQb11VP02AxLs9D/Q/m4SXGUBCe+cylFGNPyNoysfZSY8864fRxPwJsX7v06QLzM5ByvWCahxoppdo+qKossMmO95t2w/PxqtGh4t+f/msZybEb0wu2/CZcoyRvm3ryVN88gsJJIwpcaT892zE7IdmpE80G0VrJL9uxbBttnOERZXzqBF6hX8aKU4qR5/WJMb7RrkwOIytVukqn9ZglUW9R/N3AsZyhy6mHEpYfbdTnqI59Y4RIKMQ/K0xVCNPvRtJBX6wuPWzCoq34atxGS4qT7V0sh1tnnrVbetvDTISSkkPs7ZOCaN+//so8qTf2E6zuJ6S8M X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(39860400002)(376002)(136003)(346002)(451199021)(36840700001)(40470700004)(46966006)(186003)(83380400001)(40460700003)(47076005)(426003)(2906002)(336012)(2616005)(86362001)(36756003)(82310400005)(81166007)(82740400003)(40480700001)(356005)(36860700001)(1076003)(966005)(316002)(41300700001)(6666004)(5660300002)(8936002)(8676002)(7696005)(478600001)(4326008)(70206006)(70586007)(6916009)(26005)(44832011)(36900700001);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 09:40:25.5212 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eb34c78a-0f8e-4210-ba3d-08db673b38bc X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT052.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6284 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Tom de Vries The gdb.dwarf2/dw2-prologue-end-2.exp test was failing for both AArch64 and Arm. As Tom pointed out here (https://inbox.sourceware.org/gdb-patches/6663707c-4297-c2f2-a0bd-f3e84fc62aad@suse.de/), there are issues with both the prologue skipper for AArch64 and Arm and an incorrect assumption by the testcase. This patch fixes both of AArch64's and Arm's prologue skippers to not skip past the end of a function. It also incorporates a fix to the testcase so it doesn't assume the prologue skipper will stop at the first instruction of the functions/labels. Regression-tested on aarch64-linux/arm-linux Ubuntu 20.04/22.04 and x86_64-linux Ubuntu 20.04. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=30506 Co-Authored-By: Tom de Vries Co-Authored-By: Luis Machado --- gdb/aarch64-tdep.c | 10 +++++++-- gdb/arm-tdep.c | 21 ++++++++++++++++--- .../gdb.dwarf2/dw2-prologue-end-2.exp | 10 ++++----- 3 files changed, 31 insertions(+), 10 deletions(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index d8603c45fd3..84a90b63b55 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -917,12 +917,15 @@ aarch64_analyze_prologue_test (void) static CORE_ADDR aarch64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) { - CORE_ADDR func_addr, limit_pc; + CORE_ADDR func_addr, func_end_addr, limit_pc; /* See if we can determine the end of the prologue via the symbol table. If so, then return either PC, or the PC after the prologue, whichever is greater. */ - if (find_pc_partial_function (pc, NULL, &func_addr, NULL)) + bool func_addr_found + = find_pc_partial_function (pc, NULL, &func_addr, &func_end_addr); + + if (func_addr_found) { CORE_ADDR post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr); @@ -942,6 +945,9 @@ aarch64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) if (limit_pc == 0) limit_pc = pc + 128; /* Magic. */ + limit_pc + = func_end_addr == 0? limit_pc : std::min (limit_pc, func_end_addr - 4); + /* Try disassembling prologue. */ return aarch64_analyze_prologue (gdbarch, pc, limit_pc, NULL); } diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index d5128754f02..a0f59557072 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -1769,12 +1769,18 @@ arm_skip_stack_protector(CORE_ADDR pc, struct gdbarch *gdbarch) static CORE_ADDR arm_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) { - CORE_ADDR func_addr, limit_pc; + CORE_ADDR func_addr, func_end_addr, limit_pc; /* See if we can determine the end of the prologue via the symbol table. If so, then return either PC, or the PC after the prologue, whichever is greater. */ - if (find_pc_partial_function (pc, NULL, &func_addr, NULL)) + bool func_addr_found + = find_pc_partial_function (pc, NULL, &func_addr, &func_end_addr); + + /* Whether the function is thumb mode or not. */ + bool func_is_thumb = false; + + if (func_addr_found) { CORE_ADDR post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr); @@ -1811,7 +1817,8 @@ arm_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) associate prologue code with the opening brace; so this lets us skip the first line if we think it is the opening brace. */ - if (arm_pc_is_thumb (gdbarch, func_addr)) + func_is_thumb = arm_pc_is_thumb (gdbarch, func_addr); + if (func_is_thumb) analyzed_limit = thumb_analyze_prologue (gdbarch, func_addr, post_prologue_pc, NULL); else @@ -1837,6 +1844,14 @@ arm_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) if (limit_pc == 0) limit_pc = pc + 64; /* Magic. */ + /* Set the correct adjustment based on whether the function is thumb mode or + not. We use it to get the address of the last instruction in the + function (as opposed to the first address of the next function). */ + CORE_ADDR adjustment = func_is_thumb? 2 : 4; + + limit_pc + = func_end_addr == 0? limit_pc : std::min (limit_pc, + func_end_addr - adjustment); /* Check if this is Thumb code. */ if (arm_pc_is_thumb (gdbarch, pc)) diff --git a/gdb/testsuite/gdb.dwarf2/dw2-prologue-end-2.exp b/gdb/testsuite/gdb.dwarf2/dw2-prologue-end-2.exp index 488f85f9674..c506cfd55cc 100644 --- a/gdb/testsuite/gdb.dwarf2/dw2-prologue-end-2.exp +++ b/gdb/testsuite/gdb.dwarf2/dw2-prologue-end-2.exp @@ -95,15 +95,15 @@ if { $break_addr == "" } { # Get the "foo_label" address. -set foo_label_addr "" -gdb_test_multiple "print /x &foo_label" "" { +set bar_label_addr "" +gdb_test_multiple "print /x &bar_label" "" { -re -wrap "= ($hex)" { - set foo_label_addr $expect_out(1,string) + set bar_label_addr $expect_out(1,string) pass $gdb_test_name } } -if { $foo_label_addr == "" } { +if { $bar_label_addr == "" } { return } @@ -115,4 +115,4 @@ gdb_test "print &foo_end == &bar_label" " = 1" # Check that the breakpoint is set at the expected address. Regression test # for PR30369. -gdb_assert { $break_addr == $foo_label_addr } +gdb_assert { $break_addr < $bar_label_addr } -- 2.25.1