From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on2073.outbound.protection.outlook.com [40.107.15.73]) by sourceware.org (Postfix) with ESMTPS id 831A63858C3A for ; Thu, 7 Sep 2023 15:20:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 831A63858C3A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ypcADwevdtXclVJ+acG2nFZ7HKBwyKKejwiNAxX6iVs=; b=Ydq3ThxEaP/c64TXgWGFgPzwvZ4VGiCErtR7TeofMmqGQC1XxsgmQx2dpaeNOHQOxTHMyGrtMFNyKWJwW1j970KyTBS3xebPpJhDymLL02iKah+1w9kacVNDg6Li8TvGSydlChJilrvtojv1AEvop31BXKWD0TZhDIJr7jE/2ao= Received: from AS9PR05CA0138.eurprd05.prod.outlook.com (2603:10a6:20b:497::22) by DU0PR08MB9077.eurprd08.prod.outlook.com (2603:10a6:10:471::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.36; Thu, 7 Sep 2023 15:20:33 +0000 Received: from AM7EUR03FT064.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:497:cafe::58) by AS9PR05CA0138.outlook.office365.com (2603:10a6:20b:497::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.34 via Frontend Transport; Thu, 7 Sep 2023 15:20:32 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT064.mail.protection.outlook.com (100.127.140.127) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.30 via Frontend Transport; Thu, 7 Sep 2023 15:20:32 +0000 Received: ("Tessian outbound b5a0f4347031:v175"); Thu, 07 Sep 2023 15:20:32 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 3ed760a9b718a554 X-CR-MTA-TID: 64aa7808 Received: from 8a33a38dd672.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 8B9588CF-4FC3-4DE6-9506-FCF617B87EC0.1; Thu, 07 Sep 2023 15:20:25 +0000 Received: from EUR03-AM7-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 8a33a38dd672.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Thu, 07 Sep 2023 15:20:25 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=MzkDfODczHadvdZ3tDBz+zw9Zy3EjfN6pzSeEKQKbtM4DbXMDgvZB1Sy07mEL0RALWwZRk8tC7t/c7vqZ2AofZZiQnG3TMnSYfARO0UvHL5KpjhNysRKhVQx6Aea+ZeuWKd9Rfo5m9q7P98xDg26SBibuHNjEZDoabsH3s4o0Q9qb8zJXTkaGZD47YjwfItWZc15ZUWPqCQOVVsigv3IwJRzj73ztjJPkbH6jP9wbUmo/YUJqnCLPzWJ4h19NOD+B5pvk9SKcrNyDLrtdeTfq0Pr6IBtnD35Q35Kz+qyELPo2vPzS8c/snpShLmCCog1ZYWDU8h3QsXvZMckZj9j7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ypcADwevdtXclVJ+acG2nFZ7HKBwyKKejwiNAxX6iVs=; b=BTERTIRXcEmvRFdkJPq1kGGbwUId8NeqnemHNQoJ8OreZ44vKTTOC1O8xFeXjHquvDMMFyMDqNhJGOjxqMyWij4eTj5Ir0wGeVNBWh5F1pseFiNzxH1PMCcdNPJa6FIug2ZzQpGy8VRqGfhFqVG405LQQoJvzhAxXmlJU8U2XMWIH8PFmHaLnCMGJe4ZDlD7Q4BHdGj0jV/Eq+gLIOsXNhDvjVZgyFEA65s5d2ZVQKXHj1a82RFEwArvCxzg1wvlT0Gi9Fd7XTleBW4hW3q6sAdpda9cvVdWZIUfIOzgvlzM2ICZ0wOvUDu7cEiVlnBwXgc1Vsyl3w6cljAmItAxJA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=sourceware.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ypcADwevdtXclVJ+acG2nFZ7HKBwyKKejwiNAxX6iVs=; b=Ydq3ThxEaP/c64TXgWGFgPzwvZ4VGiCErtR7TeofMmqGQC1XxsgmQx2dpaeNOHQOxTHMyGrtMFNyKWJwW1j970KyTBS3xebPpJhDymLL02iKah+1w9kacVNDg6Li8TvGSydlChJilrvtojv1AEvop31BXKWD0TZhDIJr7jE/2ao= Received: from AS9PR06CA0622.eurprd06.prod.outlook.com (2603:10a6:20b:46e::21) by AS8PR08MB9816.eurprd08.prod.outlook.com (2603:10a6:20b:613::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.34; Thu, 7 Sep 2023 15:20:23 +0000 Received: from AM7EUR03FT011.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:46e:cafe::1e) by AS9PR06CA0622.outlook.office365.com (2603:10a6:20b:46e::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.34 via Frontend Transport; Thu, 7 Sep 2023 15:20:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT011.mail.protection.outlook.com (100.127.140.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6768.30 via Frontend Transport; Thu, 7 Sep 2023 15:20:23 +0000 Received: from AZ-NEU-EX03.Arm.com (10.251.24.31) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 7 Sep 2023 15:20:23 +0000 Received: from e129171.cambridge.arm.com (10.1.32.59) by mail.arm.com (10.251.24.31) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Thu, 7 Sep 2023 15:20:23 +0000 From: Luis Machado To: CC: Subject: [PATCH v5 10/16] [gdb/aarch64] sme: Fixup sigframe gdbarch when vg/svg changes Date: Thu, 7 Sep 2023 16:20:12 +0100 Message-ID: <20230907152018.1031257-11-luis.machado@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230907152018.1031257-1-luis.machado@arm.com> References: <20230907152018.1031257-1-luis.machado@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT011:EE_|AS8PR08MB9816:EE_|AM7EUR03FT064:EE_|DU0PR08MB9077:EE_ X-MS-Office365-Filtering-Correlation-Id: 005ea7c7-956b-41c9-8627-08dbafb5fa6e x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: JRwhpETekm0PNbHcMSIs2EmnvfwqsZtIMz2IoNKJJ9MPL3jm4ida3IXwUwW/ChJC0dYGUwZ/hnZSN0JRRJpfhiC9zWtYBaR6sXM69vwHPYTPRmC/+Nf1hSDz63UuvBrl4Yj8g6eR1VX+mpM2A0cABZMHtsagGW+7b/zAVlAQ/eTStI2BqxQDF15mo9F7mJK9dN1UIZqwEUiUwpFjHZk/t2X4Qb1mn9GeYlPfrXcHziyaRWPeuENrhSpV6ndfDw/xUjsIByS2BdfC7VDogYhpW5jPIe/jNhqcLDiYxUyj5ju2hqNCKc638QPlvCeW0VlpcYoAUPbde3wH/+wKtnmUrkapq4/+VOsqUXak3r3CXuA1IJH3DQUlcQ4Wk7LTHNi6sPQeJAKVVblh3WXUY46EZ0QwZORmSiQL6o3ZQt/7oQ2a7/U/lKHNJlxlz9HYxt2DjnrMHuAulD7kya6tls3ltyzBOhBOU41Uk0UsXmbHQdVwUgGVCnVG9OXG3/5gLOgzPm8HqDV7XO/J4V275lgU4Oc3xsyMba0VSkf494Zxn6sKyEXenr6ulxmomIQOseZ8DPbCX2o384zJA3r/ip3Jb+kPVQDScP9RgSdk+9WkeRoqtCYZEgU5fW1Qzs22/bl7MxZqxbsx6m/wbknMWLbYD780HGgaUjXwMVWNMk2zTPFf/q8jzxuY2sZUM9zkVLlH7RlaQnghFYn+kHgYxtN9m2cqzjDyDyJkdzZRAHivWXKeeu8ZDs0yw/t+h2rYboHm X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(376002)(346002)(39860400002)(396003)(82310400011)(186009)(451199024)(1800799009)(46966006)(36840700001)(81166007)(356005)(82740400003)(66899024)(6666004)(7696005)(47076005)(86362001)(36756003)(36860700001)(44832011)(40480700001)(30864003)(336012)(2906002)(26005)(426003)(83380400001)(1076003)(478600001)(316002)(8936002)(70586007)(8676002)(5660300002)(4326008)(70206006)(41300700001)(2616005)(6916009)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB9816 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 657178f4-ecec-4dff-935b-08dbafb5f4e1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: j0gL3mnlSPQS2nlyS/8HY6Dzar72MvhTu20azHxjCezHVVOqaLPRLxieg9/bd2UVt2OehnF6YDKnte6qlBeMEPzLVlvMx8WxI9uoiz6n7XWuXnN9A4+VxgZrk3iH/+DnyRDHnHo364pFKtNtqHiDyd1T4OdEvIDD/uCv5Em9GhbKf9649yGPJrmRjhnRQIdGPN9rYg0si6p9hN1NtJMwlvxpiUFi+UJv26dnlnGzzR3nRRT2x6ommGh4JsGO32JTM/FDAoKCrIJx4MuEbLBjEgP43PBfojj6oTJpgHMOxBs/kmQf4WfP7i471UEuOIYcK4n627iN9VtVoIrOjohjjZiSPMfa20PRS68UqHptB19eDCRLWOTvmXWpcb+7oNtwYJ1htdVkc4MGrgNmkipSgozmZa8iissJFyLtIYZbV49ulL1YqtLD4IN0i+zlNN9HtSX0jDn0sxnsdov52P1h8tYizCylU1hqeYbF90Z1TGZv7NXz55q7fpUox1pg6sDZ8nJph8wbWym6dHSE68tbmzRErXektqOnNsKotb7neqRkE8lXdkw8QTgJxEle6sRFMHyk0YaK+VSRhSH4ue87VqoJNSNwzT2OEfM3ytFeeuEGH8qFOHniuKi1RfyUs+N4haK/AvadDo2xo2woDlvJrvh8+6AfP0W1FpkRZ5MzkGb0SD6BoFHiFeeCjAVbDRor77TRKBCNOLZSDyiC2XfQnGHK+8z1El+7txnGO5oSp+WyQOc3g3W+O3n30mYGEZwo X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230031)(4636009)(346002)(136003)(39860400002)(376002)(396003)(451199024)(82310400011)(1800799009)(186009)(46966006)(40470700004)(36840700001)(5660300002)(44832011)(8676002)(8936002)(7696005)(4326008)(316002)(30864003)(6916009)(70586007)(70206006)(41300700001)(2906002)(478600001)(6666004)(26005)(2616005)(1076003)(107886003)(426003)(336012)(47076005)(36860700001)(83380400001)(81166007)(82740400003)(66899024)(40460700003)(86362001)(36756003)(40480700001);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Sep 2023 15:20:32.7920 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 005ea7c7-956b-41c9-8627-08dbafb5fa6e X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB9077 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Updates in v4: - Addressed review comments --- With SME, where you have two different vector lengths (vl and svl), it may be the case that the current frame has a set of vector lengths (A) but the signal context has a distinct set of vector lengths (B). In this case, we may run into a situation where GDB attempts to use a gdbarch created for set A, but it is really dealing with a frame that was using set B. This is problematic, specially with SME, because now we have a different number of pseudo-registers and types that gets cached on creation of each gdbarch variation. For AArch64 we really need to be able to use the correct gdbarch for each frame, and I noticed the signal frame (tramp-frame) doesn't have a settable prev_arch field. So it ends up using the default frame_unwind_arch function and eventually calling get_frame_arch (next_frame). That means the previous frame will always have the same gdbarch as the current frame. This patch first refactors the AArch64/Linux signal context code, simplifying it and making it reusable for our purposes of calculating the previous frame's gdbarch. I introduced a struct that holds information that we have found in the signal context, and with which we can make various decisions. Finally, a small change to tramp-frame.c and tramp-frame.h to expose a prev_arch hook that the architecture can set. With this new field, AArch64/Linux can implement a hook that looks at the signal context and infers the gdbarch for the previous frame. Regression-tested on aarch64-linux Ubuntu 22.04/20.04. --- gdb/aarch64-linux-tdep.c | 278 +++++++++++++++++++++++++++------------ gdb/tramp-frame.c | 1 + gdb/tramp-frame.h | 11 ++ 3 files changed, 204 insertions(+), 86 deletions(-) diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c index f76d1888072..39855844ad0 100644 --- a/gdb/aarch64-linux-tdep.c +++ b/gdb/aarch64-linux-tdep.c @@ -184,6 +184,39 @@ #define AARCH64_SME_CONTEXT_SIZE(svq) \ (AARCH64_SME_CONTEXT_REGS_OFFSET + AARCH64_SME_CONTEXT_ZA_SIZE (svq)) +/* Holds information about the signal frame. */ +struct aarch64_linux_sigframe +{ + /* The stack pointer value. */ + CORE_ADDR sp = 0; + /* The sigcontext address. */ + CORE_ADDR sigcontext_address = 0; + /* The start/end signal frame section addresses. */ + CORE_ADDR section = 0; + CORE_ADDR section_end = 0; + + /* Starting address of the section containing the general purpose + registers. */ + CORE_ADDR gpr_section = 0; + /* Starting address of the section containing the FPSIMD registers. */ + CORE_ADDR fpsimd_section = 0; + /* Starting address of the section containing the SVE registers. */ + CORE_ADDR sve_section = 0; + /* Starting address of the section containing the ZA register. */ + CORE_ADDR za_section = 0; + /* Starting address of the section containing extra information. */ + CORE_ADDR extra_section = 0; + + /* The vector length (SVE or SSVE). */ + ULONGEST vl = 0; + /* The streaming vector length (SSVE/ZA). */ + ULONGEST svl = 0; + /* True if we are in streaming mode, false otherwise. */ + bool streaming_mode = false; + /* True if we have a ZA payload, false otherwise. */ + bool za_payload = false; +}; + /* Read an aarch64_ctx, returning the magic value, and setting *SIZE to the size, or return 0 on error. */ @@ -318,129 +351,115 @@ aarch64_linux_restore_vregs (struct gdbarch *gdbarch, } } -/* Implement the "init" method of struct tramp_frame. */ +/* Given a signal frame THIS_FRAME, read the signal frame information into + SIGNAL_FRAME. */ static void -aarch64_linux_sigframe_init (const struct tramp_frame *self, - frame_info_ptr this_frame, - struct trad_frame_cache *this_cache, - CORE_ADDR func) +aarch64_linux_read_signal_frame_info (frame_info_ptr this_frame, + struct aarch64_linux_sigframe &signal_frame) { - struct gdbarch *gdbarch = get_frame_arch (this_frame); - enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - CORE_ADDR sp = get_frame_register_unsigned (this_frame, AARCH64_SP_REGNUM); - CORE_ADDR sigcontext_addr = (sp + AARCH64_RT_SIGFRAME_UCONTEXT_OFFSET - + AARCH64_UCONTEXT_SIGCONTEXT_OFFSET ); - CORE_ADDR section = sigcontext_addr + AARCH64_SIGCONTEXT_RESERVED_OFFSET; - CORE_ADDR section_end = section + AARCH64_SIGCONTEXT_RESERVED_SIZE; - CORE_ADDR fpsimd = 0; - CORE_ADDR sve_regs = 0; - CORE_ADDR za_state = 0; - uint64_t svcr = 0; + signal_frame.sp = get_frame_register_unsigned (this_frame, AARCH64_SP_REGNUM); + signal_frame.sigcontext_address + = signal_frame.sp + AARCH64_RT_SIGFRAME_UCONTEXT_OFFSET + + AARCH64_UCONTEXT_SIGCONTEXT_OFFSET; + signal_frame.section + = signal_frame.sigcontext_address + AARCH64_SIGCONTEXT_RESERVED_OFFSET; + signal_frame.section_end + = signal_frame.section + AARCH64_SIGCONTEXT_RESERVED_SIZE; + + signal_frame.gpr_section + = signal_frame.sigcontext_address + AARCH64_SIGCONTEXT_XO_OFFSET; + + /* Search for all the other sections, stopping at null. */ + CORE_ADDR section = signal_frame.section; + CORE_ADDR section_end = signal_frame.section_end; uint32_t size, magic; - size_t vq = 0, svq = 0; bool extra_found = false; - int num_regs = gdbarch_num_regs (gdbarch); - - /* Read in the integer registers. */ + enum bfd_endian byte_order + = gdbarch_byte_order (get_frame_arch (this_frame)); - for (int i = 0; i < 31; i++) - { - trad_frame_set_reg_addr (this_cache, - AARCH64_X0_REGNUM + i, - sigcontext_addr + AARCH64_SIGCONTEXT_XO_OFFSET - + i * AARCH64_SIGCONTEXT_REG_SIZE); - } - trad_frame_set_reg_addr (this_cache, AARCH64_SP_REGNUM, - sigcontext_addr + AARCH64_SIGCONTEXT_XO_OFFSET - + 31 * AARCH64_SIGCONTEXT_REG_SIZE); - trad_frame_set_reg_addr (this_cache, AARCH64_PC_REGNUM, - sigcontext_addr + AARCH64_SIGCONTEXT_XO_OFFSET - + 32 * AARCH64_SIGCONTEXT_REG_SIZE); - - /* Search for the FP and SVE sections, stopping at null. */ while ((magic = read_aarch64_ctx (section, byte_order, &size)) != 0 && size != 0) { switch (magic) { case AARCH64_FPSIMD_MAGIC: - fpsimd = section; - section += size; - break; + { + signal_frame.fpsimd_section = section; + section += size; + break; + } case AARCH64_SVE_MAGIC: { /* Check if the section is followed by a full SVE dump, and set sve_regs if it is. */ gdb_byte buf[4]; - uint16_t flags; - - if (!tdep->has_sve ()) - break; + /* Extract the vector length. */ if (target_read_memory (section + AARCH64_SVE_CONTEXT_VL_OFFSET, buf, 2) != 0) { + warning (_("Failed to read the vector length from the SVE " + "signal frame context.")); section += size; break; } - vq = sve_vq_from_vl (extract_unsigned_integer (buf, 2, byte_order)); - /* If SME is supported, also read the flags field. It may - indicate if this SVE context is for streaming mode (SSVE). */ - if (tdep->has_sme ()) + signal_frame.vl = extract_unsigned_integer (buf, 2, byte_order); + + /* Extract the flags to check if we are in streaming mode. */ + if (target_read_memory (section + + AARCH64_SVE_CONTEXT_FLAGS_OFFSET, + buf, 2) != 0) { - if (target_read_memory (section - + AARCH64_SVE_CONTEXT_FLAGS_OFFSET, - buf, 2) != 0) - { - section += size; - break; - } - flags = extract_unsigned_integer (buf, 2, byte_order); - - /* Is this SSVE data? If so, enable the SM bit in SVCR. */ - if (flags & SVE_SIG_FLAG_SM) - svcr |= SVCR_SM_BIT; + warning (_("Failed to read the flags from the SVE signal frame" + " context.")); + section += size; + break; } - if (size >= AARCH64_SVE_CONTEXT_SIZE (vq)) - sve_regs = section + AARCH64_SVE_CONTEXT_REGS_OFFSET; + uint16_t flags = extract_unsigned_integer (buf, 2, byte_order); + /* Is this SSVE data? If so, we are in streaming mode. */ + signal_frame.streaming_mode + = (flags & SVE_SIG_FLAG_SM) ? true : false; + + ULONGEST vq = sve_vq_from_vl (signal_frame.vl); + if (size >= AARCH64_SVE_CONTEXT_SIZE (vq)) + { + signal_frame.sve_section + = section + AARCH64_SVE_CONTEXT_REGS_OFFSET; + } section += size; break; } case AARCH64_ZA_MAGIC: { - if (!tdep->has_sme ()) - { - section += size; - break; - } - /* Check if the section is followed by a full ZA dump, and set za_state if it is. */ gdb_byte buf[2]; + /* Extract the streaming vector length. */ if (target_read_memory (section + AARCH64_SME_CONTEXT_SVL_OFFSET, buf, 2) != 0) { + warning (_("Failed to read the streaming vector length from " + "ZA signal frame context.")); section += size; break; } - svq = sve_vq_from_vl (extract_unsigned_integer (buf, 2, - byte_order)); + + signal_frame.svl = extract_unsigned_integer (buf, 2, byte_order); + ULONGEST svq = sve_vq_from_vl (signal_frame.svl); if (size >= AARCH64_SME_CONTEXT_SIZE (svq)) { - za_state = section + AARCH64_SME_CONTEXT_REGS_OFFSET; - /* We have ZA data. Enable the ZA bit in SVCR. */ - svcr |= SVCR_ZA_BIT; + signal_frame.za_section + = section + AARCH64_SME_CONTEXT_REGS_OFFSET; + signal_frame.za_payload = true; } - section += size; break; } @@ -456,11 +475,14 @@ aarch64_linux_sigframe_init (const struct tramp_frame *self, if (target_read_memory (section + AARCH64_EXTRA_DATAP_OFFSET, buf, 8) != 0) { + warning (_("Failed to read the extra section address from the" + " signal frame context.")); section += size; break; } section = extract_unsigned_integer (buf, 8, byte_order); + signal_frame.extra_section = section; extra_found = true; break; } @@ -476,11 +498,48 @@ aarch64_linux_sigframe_init (const struct tramp_frame *self, if (!extra_found && section > section_end) break; } +} + +/* Implement the "init" method of struct tramp_frame. */ + +static void +aarch64_linux_sigframe_init (const struct tramp_frame *self, + frame_info_ptr this_frame, + struct trad_frame_cache *this_cache, + CORE_ADDR func) +{ + /* Read the signal context information. */ + struct aarch64_linux_sigframe signal_frame; + aarch64_linux_read_signal_frame_info (this_frame, signal_frame); + + /* Now we have all the data required to restore the registers from the + signal frame. */ + + /* Restore the general purpose registers. */ + CORE_ADDR offset = signal_frame.gpr_section; + for (int i = 0; i < 31; i++) + { + trad_frame_set_reg_addr (this_cache, AARCH64_X0_REGNUM + i, offset); + offset += AARCH64_SIGCONTEXT_REG_SIZE; + } + trad_frame_set_reg_addr (this_cache, AARCH64_SP_REGNUM, offset); + offset += AARCH64_SIGCONTEXT_REG_SIZE; + trad_frame_set_reg_addr (this_cache, AARCH64_PC_REGNUM, offset); - if (sve_regs != 0) + struct gdbarch *gdbarch = get_frame_arch (this_frame); + aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + /* Restore the SVE / FPSIMD registers. */ + if (tdep->has_sve () && signal_frame.sve_section != 0) { - CORE_ADDR offset; + ULONGEST vq = sve_vq_from_vl (signal_frame.vl); + CORE_ADDR sve_regs = signal_frame.sve_section; + + /* Restore VG. */ + trad_frame_set_reg_value (this_cache, AARCH64_SVE_VG_REGNUM, + sve_vg_from_vl (signal_frame.vl)); + int num_regs = gdbarch_num_regs (gdbarch); for (int i = 0; i < 32; i++) { offset = sve_regs + (i * vq * 16); @@ -510,30 +569,75 @@ aarch64_linux_sigframe_init (const struct tramp_frame *self, trad_frame_set_reg_addr (this_cache, AARCH64_SVE_FFR_REGNUM, offset); } - if (fpsimd != 0) + /* Restore the FPSIMD registers. */ + if (signal_frame.fpsimd_section != 0) { + CORE_ADDR fpsimd = signal_frame.fpsimd_section; + trad_frame_set_reg_addr (this_cache, AARCH64_FPSR_REGNUM, fpsimd + AARCH64_FPSIMD_FPSR_OFFSET); trad_frame_set_reg_addr (this_cache, AARCH64_FPCR_REGNUM, fpsimd + AARCH64_FPSIMD_FPCR_OFFSET); /* If there was no SVE section then set up the V registers. */ - if (sve_regs == 0) + if (!tdep->has_sve () || signal_frame.sve_section == 0) aarch64_linux_restore_vregs (gdbarch, this_cache, fpsimd); } - if (za_state != 0) + /* Restore the SME registers. */ + if (tdep->has_sme ()) { - /* Restore the ZA state. */ - trad_frame_set_reg_addr (this_cache, tdep->sme_za_regnum, - za_state); + if (signal_frame.za_section != 0) + { + /* Restore the ZA state. */ + trad_frame_set_reg_addr (this_cache, tdep->sme_za_regnum, + signal_frame.za_section); + } + + /* Restore/Reconstruct SVCR. */ + ULONGEST svcr = 0; + svcr |= signal_frame.za_payload ? SVCR_ZA_BIT : 0; + svcr |= signal_frame.streaming_mode ? SVCR_SM_BIT : 0; + trad_frame_set_reg_value (this_cache, tdep->sme_svcr_regnum, svcr); + + /* Restore SVG. */ + trad_frame_set_reg_value (this_cache, tdep->sme_svg_regnum, + sve_vg_from_vl (signal_frame.svl)); } - /* If SME is supported, set SVCR as well. */ - if (tdep->has_sme ()) - trad_frame_set_reg_value (this_cache, tdep->sme_svcr_regnum, svcr); + trad_frame_set_id (this_cache, frame_id_build (signal_frame.sp, func)); +} - trad_frame_set_id (this_cache, frame_id_build (sp, func)); +/* Implements the "prev_arch" method of struct tramp_frame. */ + +static struct gdbarch * +aarch64_linux_sigframe_prev_arch (frame_info_ptr this_frame, + void **frame_cache) +{ + struct trad_frame_cache *cache + = (struct trad_frame_cache *) *frame_cache; + + gdb_assert (cache != nullptr); + + struct aarch64_linux_sigframe signal_frame; + aarch64_linux_read_signal_frame_info (this_frame, signal_frame); + + /* The SVE vector length and the SME vector length may change from frame to + frame. Make sure we report the correct architecture to the previous + frame. + + We can reuse the next frame's architecture here, as it should be mostly + the same, except for potential different vg and svg values. */ + const struct target_desc *tdesc + = gdbarch_target_desc (get_frame_arch (this_frame)); + aarch64_features features = aarch64_features_from_target_desc (tdesc); + features.vq = sve_vq_from_vl (signal_frame.vl); + features.svq = (uint8_t) sve_vq_from_vl (signal_frame.svl); + + struct gdbarch_info info; + info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64); + info.target_desc = aarch64_read_description (features); + return gdbarch_find_by_info (info); } static const struct tramp_frame aarch64_linux_rt_sigframe = @@ -550,7 +654,9 @@ static const struct tramp_frame aarch64_linux_rt_sigframe = {0xd4000001, ULONGEST_MAX}, {TRAMP_SENTINEL_INSN, ULONGEST_MAX} }, - aarch64_linux_sigframe_init + aarch64_linux_sigframe_init, + nullptr, /* validate */ + aarch64_linux_sigframe_prev_arch, /* prev_arch */ }; /* Register maps. */ diff --git a/gdb/tramp-frame.c b/gdb/tramp-frame.c index c69ee6efc2c..94e42e9fec1 100644 --- a/gdb/tramp-frame.c +++ b/gdb/tramp-frame.c @@ -170,5 +170,6 @@ tramp_frame_prepend_unwinder (struct gdbarch *gdbarch, unwinder->stop_reason = default_frame_unwind_stop_reason; unwinder->this_id = tramp_frame_this_id; unwinder->prev_register = tramp_frame_prev_register; + unwinder->prev_arch = tramp_frame->prev_arch; frame_unwind_prepend_unwinder (gdbarch, unwinder); } diff --git a/gdb/tramp-frame.h b/gdb/tramp-frame.h index fa0241acb2d..9b43d5e1a36 100644 --- a/gdb/tramp-frame.h +++ b/gdb/tramp-frame.h @@ -42,6 +42,13 @@ struct trad_frame_cache; instruction sequence. */ #define TRAMP_SENTINEL_INSN ULONGEST_MAX +/* Assuming the frame chain: (outer) prev <-> this <-> next (inner); + use THIS frame, and implicitly the NEXT frame's register unwind + method, to return PREV frame's architecture. */ + +typedef struct gdbarch *(frame_prev_arch_ftype) (frame_info_ptr this_frame, + void **this_prologue_cache); + struct tramp_frame { /* The trampoline's type, some a signal trampolines, some are normal @@ -75,6 +82,10 @@ struct tramp_frame int (*validate) (const struct tramp_frame *self, frame_info_ptr this_frame, CORE_ADDR *pc); + + /* Given the current frame in THIS_FRAME and a frame cache in FRAME_CACHE, + return the architecture of the previous frame. */ + frame_prev_arch_ftype *prev_arch; }; void tramp_frame_prepend_unwinder (struct gdbarch *gdbarch, -- 2.25.1