From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca (simark.ca [158.69.221.121]) by sourceware.org (Postfix) with ESMTPS id 0F9493858D35 for ; Fri, 8 Sep 2023 15:21:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0F9493858D35 Authentication-Results: sourceware.org; dmarc=fail (p=none dis=none) header.from=efficios.com Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=efficios.com Received: from smarchi-efficios.internal.efficios.com (192-222-143-198.qc.cable.ebox.net [192.222.143.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 7BABB1E0C2; Fri, 8 Sep 2023 11:21:04 -0400 (EDT) From: Simon Marchi To: gdb-patches@sourceware.org Cc: Simon Marchi Subject: [PATCH 2/2] gdb/doc: describe x87 registers Date: Fri, 8 Sep 2023 11:20:58 -0400 Message-ID: <20230908152102.32731-2-simon.marchi@efficios.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230908152102.32731-1-simon.marchi@efficios.com> References: <20230908152102.32731-1-simon.marchi@efficios.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3497.1 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_SOFTFAIL,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: While investigating this [1], I initially had no idea what register "fioff" stood for, making it difficult to map it to something in the Intel or AMD manuals. Similarly, I can imaging someone familiar with x87 to want to print the "x87 last instruction address", and have no clue that GDB makes it available as register "fioff". The names of the x87 state fields don't seem to be standardized, they even change between sections of the Intel manual (between the FSAVE, FXSAVE and XSAVE area descriptions). Add some details to the doc to help one map GDB register names to x87 state fields. [1] https://inbox.sourceware.org/gdb-patches/20230908022722.430741-1-simon.marchi@efficios.com/T/#u Change-Id: I0ea1eb648358e62da4aa87eea3515ee8a09f2762 --- gdb/doc/gdb.texinfo | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 72083fc5b64f..90d928fb295d 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -26310,6 +26310,25 @@ At this last step the value of bnd0 can be changed for investigation of bound violations caused along the execution of the call. In order to know how to set the bound registers or bound table for the call consult the ABI. +@subsubsection x87 registers + +GDB provides access to the x87 state through the following registers: + +@itemize + +@item @code{$st0} to @code{st7}: @code{ST(0)} to @code{ST(7)} floating-point +registers +@item @code{$fctrl}: control word register (@code{FCW}) +@item @code{$fstat}: status word register (@code{FSW}) +@item @code{$ftag}: tag word (@code{FTW}) +@item @code{$fiseg}: last instruction pointer segment +@item @code{$fioff}: last instruction pointer +@item @code{$foseg}: last data pointer segment +@item @code{$fooff}: last data pointer +@item @code{$fop}: last opcode + +@end itemize + @node Alpha @subsection Alpha -- 2.42.0