From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id 229573858D1E for ; Wed, 8 Nov 2023 05:12:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 229573858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=polymtl.ca Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=polymtl.ca ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 229573858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=132.207.4.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699420354; cv=none; b=KZkJTxz8OMiwx72+DuO29sZH83u5rOkV0grGpacdtPcC176emSwFIa4cKeQWkF3TUoCkJc9AOP34AjcFbWaIoeHi2un7Gcjvdfj8fe42xGPCDB3xGzL7EGhZhsltQk6gT02+ZHaqMRe1GyZJeUXrBLZMRmc/6rVKPcOL8G+BfdM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699420354; c=relaxed/simple; bh=EmTsSFBpHYB9QvToloK97pMTB1Iigwhw/eNys9TkNos=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=IF+jLdoNSmZ9RKTCM3azZ8vWTSVbcKREHQsRghHi+0AkE9d9fqkWi91QlH2nmjhvhL6ca1ivpsGLQtL1Rjn8M7oogzQYiAxlgs6dSRN87G9ZtLqCTd/1+b5i1DtxcoPFPd//dCkhs/mr0d3oLsJ/qP1WANNGJq+vewFKonir63Y= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 3A85CQ8p015312 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 8 Nov 2023 00:12:31 -0500 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 3A85CQ8p015312 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=polymtl.ca; s=default; t=1699420351; bh=bMh5ItM7Ke+Pt/9NjfiYZN+Zngv6MVNwMKvx/Fgxxdc=; h=From:To:Cc:Subject:Date:From; b=V3GklvEmegBx6coU77UNj7aEFDhrERUT4K0srFIW4KfVzbaJ+LqgAGZ5nBsiYPuRS ZfCBX2/pIWU0djKlxy3F+wI2TugHTcOkpmbBMmbT8Nype2XBjZ+4j/BAdzE46H27IE M+Cl+pwoffgT/NO3F5icM04GloQHbTixMvDdeJC4= Received: from simark.localdomain (modemcable238.237-201-24.mc.videotron.ca [24.201.237.238]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 7A3BC1E098; Wed, 8 Nov 2023 00:12:26 -0500 (EST) From: Simon Marchi To: gdb-patches@sourceware.org Cc: Simon Marchi Subject: [PATCH 00/24] Fix reading and writing pseudo registers in non-current frames Date: Wed, 8 Nov 2023 00:00:44 -0500 Message-ID: <20231108051222.1275306-1-simon.marchi@polymtl.ca> X-Mailer: git-send-email 2.42.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Wed, 8 Nov 2023 05:12:26 +0000 X-Spam-Status: No, score=-3182.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This series fixes reading/writing pseudo registers from/to non-current frames (that is, frames other than frame 0). Currently, we get this: (gdb) frame 0 #0 break_here_asm () at /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S:38 38 pop %rbx (gdb) p/x $rbx $1 = 0x2021222324252627 (gdb) p/x $ebx $2 = 0x24252627 (gdb) frame 1 #1 0x000055555555517d in caller () at /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S:58 58 call callee (gdb) p/x $rbx $3 = 0x1011121314151617 (gdb) p/x $ebx $4 = 0x24252627 This is a bit surprising, we would expect the last value to be 0x14151617, the bottom half of the rbx value from frame 1 (the currently selected frame at that point). Instead, we got the bottom half of the rbx value from frame 0. This is because pseudo registers are always read/written from/to the current thread's regcache. This series fixes this (as well as writing to pseudo registers) by making it so pseudo registers are read/written using a frame. Simon Marchi (24): gdb: don't handle i386 k registers as pseudo registers gdb: use reg_buffer_common throughout gdbsupport/common-regcache.h gdb: make store_integer take an array_view gdb: simplify conditions in regcache::{read,write,raw_collect,raw_supply}_part gdb: change regcache interface to use array_view gdb: fix bugs in {get,put}_frame_register_bytes gdb: make put_frame_register take an array_view gdb: change value_of_register and value_of_register_lazy to take the next frame gdb: remove frame_register gdb: make put_frame_register take the next frame gdb: make put_frame_register_bytes take the next frame gdb: make get_frame_register_bytes take the next frame gdb: add value::allocate_register gdb: read pseudo register through frame gdb: change parameter name in frame_unwind_register_unsigned declaration gdb: rename gdbarch_pseudo_register_write to gdbarch_deprecated_pseudo_register_write gdb: add gdbarch_pseudo_register_write that takes a frame gdb: migrate i386 and amd64 to the new gdbarch_pseudo_register_write gdb: make aarch64_za_offsets_from_regnum return za_offsets gdb: add missing raw register read in aarch64_sme_pseudo_register_write gdb: migrate aarch64 to new gdbarch_pseudo_register_write gdb: migrate arm to gdbarch_pseudo_register_read_value gdb: migrate arm to new gdbarch_pseudo_register_write gdb/testsuite: add tests for unwinding of pseudo registers gdb/aarch64-tdep.c | 297 +++++----- gdb/alpha-tdep.c | 11 +- gdb/amd64-tdep.c | 82 +-- gdb/arch/arm-get-next-pcs.c | 6 +- gdb/arch/arm-get-next-pcs.h | 5 +- gdb/arch/arm.c | 2 +- gdb/arch/arm.h | 4 +- gdb/arm-linux-tdep.c | 11 +- gdb/arm-tdep.c | 145 +++-- gdb/avr-tdep.c | 3 +- gdb/bfin-tdep.c | 3 +- gdb/csky-tdep.c | 4 +- gdb/defs.h | 39 +- gdb/dwarf2/expr.c | 22 +- gdb/dwarf2/frame.c | 5 +- gdb/eval.c | 3 +- gdb/findvar.c | 50 +- gdb/frame-unwind.c | 3 +- gdb/frame.c | 174 +++--- gdb/frame.h | 28 +- gdb/frv-tdep.c | 3 +- gdb/gdbarch-gen.h | 28 +- gdb/gdbarch.c | 40 +- gdb/gdbarch_components.py | 29 +- gdb/guile/scm-frame.c | 3 +- gdb/h8300-tdep.c | 3 +- gdb/i386-tdep.c | 380 ++++-------- gdb/i386-tdep.h | 15 +- gdb/i387-tdep.c | 16 +- gdb/ia64-tdep.c | 18 +- gdb/infcmd.c | 6 +- gdb/loongarch-tdep.c | 3 +- gdb/m32c-tdep.c | 3 +- gdb/m68hc11-tdep.c | 3 +- gdb/m68k-tdep.c | 17 +- gdb/mep-tdep.c | 3 +- gdb/mi/mi-main.c | 3 +- gdb/mips-tdep.c | 29 +- gdb/msp430-tdep.c | 3 +- gdb/nat/aarch64-hw-point.c | 3 +- gdb/nat/aarch64-scalable-linux-ptrace.c | 20 +- gdb/nat/linux-btrace.c | 3 +- gdb/nds32-tdep.c | 8 +- gdb/python/py-frame.c | 3 +- gdb/python/py-unwind.c | 4 +- gdb/regcache.c | 548 +++++++++++------- gdb/regcache.h | 113 +++- gdb/riscv-tdep.c | 13 +- gdb/rl78-tdep.c | 3 +- gdb/rs6000-tdep.c | 21 +- gdb/s12z-tdep.c | 2 +- gdb/s390-tdep.c | 3 +- gdb/sh-tdep.c | 9 +- gdb/sparc-tdep.c | 3 +- gdb/sparc64-tdep.c | 3 +- gdb/std-regs.c | 11 +- .../gdb.arch/aarch64-pseudo-unwind-asm.S | 82 +++ .../gdb.arch/aarch64-pseudo-unwind.c | 33 ++ .../gdb.arch/aarch64-pseudo-unwind.exp | 90 +++ .../gdb.arch/amd64-pseudo-unwind-asm.S | 66 +++ gdb/testsuite/gdb.arch/amd64-pseudo-unwind.c | 33 ++ .../gdb.arch/amd64-pseudo-unwind.exp | 91 +++ .../gdb.arch/arm-pseudo-unwind-asm.S | 81 +++ .../gdb.arch/arm-pseudo-unwind-legacy-asm.S | 84 +++ .../gdb.arch/arm-pseudo-unwind-legacy.c | 33 ++ .../gdb.arch/arm-pseudo-unwind-legacy.exp | 86 +++ gdb/testsuite/gdb.arch/arm-pseudo-unwind.c | 33 ++ gdb/testsuite/gdb.arch/arm-pseudo-unwind.exp | 88 +++ gdb/valops.c | 31 +- gdb/value.c | 149 +++++ gdb/value.h | 64 +- gdb/xtensa-tdep.c | 3 +- gdbserver/linux-arm-low.cc | 4 +- gdbserver/regcache.cc | 69 ++- gdbserver/regcache.h | 6 +- gdbsupport/common-regcache.cc | 2 +- gdbsupport/common-regcache.h | 58 +- gdbsupport/rsp-low.cc | 8 + gdbsupport/rsp-low.h | 2 + 79 files changed, 2324 insertions(+), 1144 deletions(-) create mode 100644 gdb/testsuite/gdb.arch/aarch64-pseudo-unwind-asm.S create mode 100644 gdb/testsuite/gdb.arch/aarch64-pseudo-unwind.c create mode 100644 gdb/testsuite/gdb.arch/aarch64-pseudo-unwind.exp create mode 100644 gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S create mode 100644 gdb/testsuite/gdb.arch/amd64-pseudo-unwind.c create mode 100644 gdb/testsuite/gdb.arch/amd64-pseudo-unwind.exp create mode 100644 gdb/testsuite/gdb.arch/arm-pseudo-unwind-asm.S create mode 100644 gdb/testsuite/gdb.arch/arm-pseudo-unwind-legacy-asm.S create mode 100644 gdb/testsuite/gdb.arch/arm-pseudo-unwind-legacy.c create mode 100644 gdb/testsuite/gdb.arch/arm-pseudo-unwind-legacy.exp create mode 100644 gdb/testsuite/gdb.arch/arm-pseudo-unwind.c create mode 100644 gdb/testsuite/gdb.arch/arm-pseudo-unwind.exp base-commit: 1185b5b79a12ba67eb60bee3f75babf7a222fde0 -- 2.42.1