From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id 3B4E53858D35 for ; Wed, 8 Nov 2023 05:26:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3B4E53858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=polymtl.ca Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=polymtl.ca ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3B4E53858D35 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=132.207.4.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699421206; cv=none; b=a8/DKDKs620frYuRWmK0uapfFIn4MZ2qiBaWVXuiz+0UGK143y9cOynE8CzdSuo2Wv/KibaYFzE4Xo+Si1WX5pKsIjez1Az3up5T5ci+MnXFL7BowhyXnYsH7z8HCFJqAe84x7PfBUOLhK0hJuQpJNQAy7wcZS8bA9iNZ9MSfLs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699421206; c=relaxed/simple; bh=okuhgng3Ilv/9pXVRg1eCvjhWmp36COqiI0DMvFPZkA=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=XfeaP5gY1b8hnfrwo+VQiMbfz6go6vgN0Zao8EriNvputFgrQrcI/Nsft0FXgs/vAGHE5zoj5p9RlL4BQni8D+E7sT9Qdzx+SH79EoII/P6cmcmDF8+S7ZBCDKujk1ANmrEO17imKbFUZLpu91gZsIo/RiBWsCuOJs0+wsjEPb8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 3A85Qc5h017728 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 8 Nov 2023 00:26:43 -0500 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 3A85Qc5h017728 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=polymtl.ca; s=default; t=1699421203; bh=e7puLOSqeRruA28YQD51aLztPb+jdqYEt4NCfOJL3Hg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rekBs2gjlEjy9s0OcUSBiLymaJ3EdRqszc0rH7YYIhfsO7wjGUUHbRWGF61et5yUd atPeEzNZvY2NiHqnw2rd/JguM2ymkEbs7bhBzcjeb3rjf3WdVurt5IXHmreMv4aysL FRAgCowKvVpr65/rXZbu/QkdEVKvyAIcvA8eseg0= Received: from simark.localdomain (modemcable238.237-201-24.mc.videotron.ca [24.201.237.238]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id A4B0B1E1C8; Wed, 8 Nov 2023 00:16:37 -0500 (EST) From: Simon Marchi To: gdb-patches@sourceware.org Cc: Simon Marchi Subject: [PATCH 21/24] gdb: migrate aarch64 to new gdbarch_pseudo_register_write Date: Wed, 8 Nov 2023 00:01:05 -0500 Message-ID: <20231108051222.1275306-22-simon.marchi@polymtl.ca> X-Mailer: git-send-email 2.42.1 In-Reply-To: <20231108051222.1275306-1-simon.marchi@polymtl.ca> References: <20231108051222.1275306-1-simon.marchi@polymtl.ca> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Wed, 8 Nov 2023 05:26:38 +0000 X-Spam-Status: No, score=-3188.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Simon Marchi Make aarch64 use the new gdbarch_pseudo_register_write. This fixes writing pseudo registers to non-current frames on this architecture. Change-Id: Ic012a0b95ae728d45a7121f77a79d604c23a849e --- gdb/aarch64-tdep.c | 132 ++++++++++++++++++++++++--------------------- 1 file changed, 71 insertions(+), 61 deletions(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index ff159c412ced..1815d78dec40 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3296,32 +3296,33 @@ aarch64_pseudo_read_value (gdbarch *gdbarch, frame_info_ptr next_frame, /* Helper for aarch64_pseudo_write. */ static void -aarch64_pseudo_write_1 (struct gdbarch *gdbarch, struct regcache *regcache, - int regnum_offset, int regsize, const gdb_byte *buf) +aarch64_pseudo_write_1 (gdbarch *gdbarch, frame_info_ptr next_frame, + int regnum_offset, + gdb::array_view buf) { unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset; - - /* Enough space for a full vector register. */ - gdb_byte reg_buf[register_size (gdbarch, AARCH64_V0_REGNUM)]; gdb_static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM); - /* Ensure the register buffer is zero, we want gdb writes of the + /* Enough space for a full vector register. + + Ensure the register buffer is zero-ed, we want gdb writes of the various 'scalar' pseudo registers to behavior like architectural writes, register width bytes are written the remainder are set to zero. */ - memset (reg_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM)); - - memcpy (reg_buf, buf, regsize); - regcache->raw_write (v_regnum, reg_buf); + constexpr int raw_reg_size = 16; + gdb_byte raw_buf[raw_reg_size] {}; + gdb::array_view raw_view (raw_buf); + copy (buf, raw_view.slice (0, buf.size ())); + put_frame_register (next_frame, v_regnum, raw_view); } /* Given REGNUM, a SME pseudo-register number, store the bytes from DATA to the pseudo-register. */ static void -aarch64_sme_pseudo_register_write (struct gdbarch *gdbarch, - struct regcache *regcache, - int regnum, const gdb_byte *data) +aarch64_sme_pseudo_register_write (gdbarch *gdbarch, frame_info_ptr next_frame, + const int regnum, + gdb::array_view data) { aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); @@ -3335,33 +3336,39 @@ aarch64_sme_pseudo_register_write (struct gdbarch *gdbarch, za_offsets offsets = aarch64_za_offsets_from_regnum (gdbarch, regnum); /* Fetch the contents of ZA. */ - size_t svl = sve_vl_from_vq (tdep->sme_svq); - gdb::byte_vector za (std::pow (svl, 2)); - regcache->raw_read (tdep->sme_za_regnum, za, 1.0f); + value *za_value = value_of_register (tdep->sme_za_regnum, next_frame); - /* Copy the requested data. */ - for (int chunks = 0; chunks < offsets.chunks; chunks++) - { - const gdb_byte *source = data + chunks * offsets.chunk_size; - gdb_byte *destination - = za.data () + offsets.starting_offset + chunks * offsets.stride_size; + { + /* Create a view only on the portion of za we want to write. */ + gdb::array_view za_view + = za_value->contents_writeable ().slice (offsets.starting_offset); - memcpy (destination, source, offsets.chunk_size); - } + /* Copy the requested data. */ + for (int chunks = 0; chunks < offsets.chunks; chunks++) + { + gdb::array_view src + = data.slice (chunks * offsets.chunk_size, offsets.chunk_size); + gdb::array_view dst + = za_view.slice (chunks * offsets.stride_size, offsets.chunk_size); + copy (src, dst); + } + } /* Write back to ZA. */ - regcache->raw_write (tdep->sme_za_regnum, za.data ()); + put_frame_register (next_frame, tdep->sme_za_regnum, + za_value->contents_raw ()); } /* Implement the "pseudo_register_write" gdbarch method. */ static void -aarch64_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache, - int regnum, const gdb_byte *buf) +aarch64_pseudo_write (gdbarch *gdbarch, frame_info_ptr next_frame, + const int pseudo_reg_num, + gdb::array_view buf) { aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - if (is_w_pseudo_register (gdbarch, regnum)) + if (is_w_pseudo_register (gdbarch, pseudo_reg_num)) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); /* Default offset for little endian. */ @@ -3371,53 +3378,56 @@ aarch64_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache, offset = 4; /* Find the correct X register to extract the data from. */ - int x_regnum = AARCH64_X0_REGNUM + (regnum - tdep->w_pseudo_base); + int x_regnum = AARCH64_X0_REGNUM + (pseudo_reg_num - tdep->w_pseudo_base); /* First zero-out the contents of X. */ - ULONGEST zero = 0; - regcache->raw_write (x_regnum, zero); + gdb_byte bytes[8] {}; + gdb::array_view bytes_view (bytes); + copy (buf, bytes_view.slice (offset, 4)); + /* Write to the bottom 4 bytes of X. */ - regcache->raw_write_part (x_regnum, offset, 4, buf); + put_frame_register (next_frame, x_regnum, bytes_view); return; } - else if (is_sme_pseudo_register (gdbarch, regnum)) + else if (is_sme_pseudo_register (gdbarch, pseudo_reg_num)) { - aarch64_sme_pseudo_register_write (gdbarch, regcache, regnum, buf); + aarch64_sme_pseudo_register_write (gdbarch, next_frame, pseudo_reg_num, + buf); return; } - regnum -= gdbarch_num_regs (gdbarch); + /* Offset in the "pseudo-register space". */ + int pseudo_offset = pseudo_reg_num - gdbarch_num_regs (gdbarch); - if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32) - return aarch64_pseudo_write_1 (gdbarch, regcache, - regnum - AARCH64_Q0_REGNUM, Q_REGISTER_SIZE, - buf); + if (pseudo_offset >= AARCH64_Q0_REGNUM + && pseudo_offset < AARCH64_Q0_REGNUM + 32) + return aarch64_pseudo_write_1 (gdbarch, next_frame, + pseudo_offset - AARCH64_Q0_REGNUM, buf); - if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32) - return aarch64_pseudo_write_1 (gdbarch, regcache, - regnum - AARCH64_D0_REGNUM, D_REGISTER_SIZE, - buf); + if (pseudo_offset >= AARCH64_D0_REGNUM + && pseudo_offset < AARCH64_D0_REGNUM + 32) + return aarch64_pseudo_write_1 (gdbarch, next_frame, + pseudo_offset - AARCH64_D0_REGNUM, buf); - if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32) - return aarch64_pseudo_write_1 (gdbarch, regcache, - regnum - AARCH64_S0_REGNUM, S_REGISTER_SIZE, - buf); + if (pseudo_offset >= AARCH64_S0_REGNUM + && pseudo_offset < AARCH64_S0_REGNUM + 32) + return aarch64_pseudo_write_1 (gdbarch, next_frame, + pseudo_offset - AARCH64_S0_REGNUM, buf); - if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32) - return aarch64_pseudo_write_1 (gdbarch, regcache, - regnum - AARCH64_H0_REGNUM, H_REGISTER_SIZE, - buf); + if (pseudo_offset >= AARCH64_H0_REGNUM + && pseudo_offset < AARCH64_H0_REGNUM + 32) + return aarch64_pseudo_write_1 (gdbarch, next_frame, + pseudo_offset - AARCH64_H0_REGNUM, buf); - if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32) - return aarch64_pseudo_write_1 (gdbarch, regcache, - regnum - AARCH64_B0_REGNUM, B_REGISTER_SIZE, - buf); + if (pseudo_offset >= AARCH64_B0_REGNUM + && pseudo_offset < AARCH64_B0_REGNUM + 32) + return aarch64_pseudo_write_1 (gdbarch, next_frame, + pseudo_offset - AARCH64_B0_REGNUM, buf); - if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM - && regnum < AARCH64_SVE_V0_REGNUM + 32) - return aarch64_pseudo_write_1 (gdbarch, regcache, - regnum - AARCH64_SVE_V0_REGNUM, - V_REGISTER_SIZE, buf); + if (tdep->has_sve () && pseudo_offset >= AARCH64_SVE_V0_REGNUM + && pseudo_offset < AARCH64_SVE_V0_REGNUM + 32) + return aarch64_pseudo_write_1 (gdbarch, next_frame, + pseudo_offset - AARCH64_SVE_V0_REGNUM, buf); gdb_assert_not_reached ("regnum out of bound"); } @@ -4483,7 +4493,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_num_pseudo_regs (gdbarch, num_pseudo_regs); set_gdbarch_pseudo_register_read_value (gdbarch, aarch64_pseudo_read_value); - set_gdbarch_deprecated_pseudo_register_write (gdbarch, aarch64_pseudo_write); + set_gdbarch_pseudo_register_write (gdbarch, aarch64_pseudo_write); set_tdesc_pseudo_register_name (gdbarch, aarch64_pseudo_register_name); set_tdesc_pseudo_register_type (gdbarch, aarch64_pseudo_register_type); set_tdesc_pseudo_register_reggroup_p (gdbarch, -- 2.42.1