From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (woodpecker.gentoo.org [140.211.166.183]) by sourceware.org (Postfix) with ESMTP id B4D8A386183F for ; Thu, 7 Dec 2023 03:59:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B4D8A386183F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B4D8A386183F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=140.211.166.183 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701921593; cv=none; b=v/WZhCytLFAzDfzXarUF9IaZTVgCJwfbPBUBfPN6g2B940FUG7WmSyVkn6B0VIj+8wX8w3BM6ennPlJ54ijxY9LuQT1kpr9u5TvXYBOZpFJ7kfCAtipbMC37k7EhqnKcmPM7xO1W1eyIPM2DG1o/17/l9NtFeaeG9ZN7IlVmm/g= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701921593; c=relaxed/simple; bh=PuQcOM9pPPjrwqI22K67aPABES83fojyo5tDE4KvziA=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=DQS0w+AWZXTbXQJJH5dESR85aSsa0cd7+egEUU+K13K6qxZR3a/OJuUekAjuccEE9BTdklUZJCu5fWKPfAZVxoZrqNWqNJRUaX6RbyhazYuuOM5IlLemrJIrI6xHi/LfBgXhZZAp1DYcdyh9JBHZ994Yd6xT6w7i8ju8WtJdKyk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by smtp.gentoo.org (Postfix, from userid 559) id 51AF2335D76; Thu, 7 Dec 2023 03:59:51 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH 07/17] sim: frv: fix -Wunused-but-set-variable warnings Date: Wed, 6 Dec 2023 20:59:27 -0700 Message-ID: <20231207035937.14920-7-vapier@gentoo.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231207035937.14920-1-vapier@gentoo.org> References: <20231207035937.14920-1-vapier@gentoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,JMQ_SPF_NEUTRAL,KAM_DMARC_STATUS,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --- sim/frv/cache.c | 2 -- sim/frv/profile-fr400.c | 11 ----------- sim/frv/profile-fr500.c | 2 -- 3 files changed, 15 deletions(-) diff --git a/sim/frv/cache.c b/sim/frv/cache.c index 76f762fe5ee7..b4f33f1252d5 100644 --- a/sim/frv/cache.c +++ b/sim/frv/cache.c @@ -362,7 +362,6 @@ read_data_from_memory (SIM_CPU *current_cpu, SI address, char *buffer, static void fill_line_from_memory (FRV_CACHE *cache, FRV_CACHE_TAG *tag, SI address) { - PCADDR pc; int line_alignment; SI read_address; SIM_CPU *current_cpu = cache->cpu; @@ -382,7 +381,6 @@ fill_line_from_memory (FRV_CACHE *cache, FRV_CACHE_TAG *tag, SI address) tag->line = cache->data_storage + (line_index * cache->line_size); } - pc = CPU_PC_GET (current_cpu); line_alignment = cache->line_size - 1; read_address = address & ~line_alignment; read_data_from_memory (current_cpu, read_address, tag->line, diff --git a/sim/frv/profile-fr400.c b/sim/frv/profile-fr400.c index 58ad8c86c4b1..31e25178a4d4 100644 --- a/sim/frv/profile-fr400.c +++ b/sim/frv/profile-fr400.c @@ -632,7 +632,6 @@ frvbf_model_fr400_u_media_1 (SIM_CPU *cpu, const IDESC *idesc, { int cycles; FRV_PROFILE_STATE *ps; - const CGEN_INSN *insn; int busy_adjustment[] = {0, 0}; int *fr; @@ -643,7 +642,6 @@ frvbf_model_fr400_u_media_1 (SIM_CPU *cpu, const IDESC *idesc, cycles = idesc->timing->units[unit_num].done; ps = CPU_PROFILE_STATE (cpu); - insn = idesc->idata; /* The latency of the registers may be less than previously recorded, depending on how they were used previously. @@ -1673,9 +1671,7 @@ frvbf_model_fr400_u_media_4 (SIM_CPU *cpu, const IDESC *idesc, { int cycles; FRV_PROFILE_STATE *ps; - const CGEN_INSN *insn; int busy_adjustment[] = {0}; - int *fr; if (model_insn == FRV_INSN_MODEL_PASS_1) return 0; @@ -1684,7 +1680,6 @@ frvbf_model_fr400_u_media_4 (SIM_CPU *cpu, const IDESC *idesc, cycles = idesc->timing->units[unit_num].done; ps = CPU_PROFILE_STATE (cpu); - insn = idesc->idata; /* The latency of the registers may be less than previously recorded, depending on how they were used previously. @@ -1709,7 +1704,6 @@ frvbf_model_fr400_u_media_4 (SIM_CPU *cpu, const IDESC *idesc, post_wait_for_FR (cpu, out_FRk); /* Restore the busy cycles of the registers we used. */ - fr = ps->fr_busy; /* The latency of the output register will be at least the latency of the other inputs. Once initiated, post-processing will take 1 cycle. */ @@ -1751,7 +1745,6 @@ frvbf_model_fr400_u_media_4_acc_dual (SIM_CPU *cpu, const IDESC *idesc, { int cycles; FRV_PROFILE_STATE *ps; - const CGEN_INSN *insn; INT ACC40Si_1; INT FRk_1; @@ -1765,8 +1758,6 @@ frvbf_model_fr400_u_media_4_acc_dual (SIM_CPU *cpu, const IDESC *idesc, ACC40Si_1 = DUAL_REG (in_ACC40Si); FRk_1 = DUAL_REG (out_FRk); - insn = idesc->idata; - /* The post processing must wait if there is a dependency on a FR which is not ready yet. */ ps->post_wait = cycles; @@ -1802,7 +1793,6 @@ frvbf_model_fr400_u_media_6 (SIM_CPU *cpu, const IDESC *idesc, { int cycles; FRV_PROFILE_STATE *ps; - const CGEN_INSN *insn; int busy_adjustment[] = {0}; int *fr; @@ -1813,7 +1803,6 @@ frvbf_model_fr400_u_media_6 (SIM_CPU *cpu, const IDESC *idesc, cycles = idesc->timing->units[unit_num].done; ps = CPU_PROFILE_STATE (cpu); - insn = idesc->idata; /* The latency of the registers may be less than previously recorded, depending on how they were used previously. diff --git a/sim/frv/profile-fr500.c b/sim/frv/profile-fr500.c index 9d268ce7bcec..0593aefd0dfb 100644 --- a/sim/frv/profile-fr500.c +++ b/sim/frv/profile-fr500.c @@ -2043,7 +2043,6 @@ frvbf_model_fr500_u_media (SIM_CPU *cpu, const IDESC *idesc, { int cycles; FRV_PROFILE_STATE *ps; - const CGEN_INSN *insn; int is_media_s1; int is_media_s2; int busy_adjustment[] = {0, 0, 0}; @@ -2057,7 +2056,6 @@ frvbf_model_fr500_u_media (SIM_CPU *cpu, const IDESC *idesc, cycles = idesc->timing->units[unit_num].done; ps = CPU_PROFILE_STATE (cpu); - insn = idesc->idata; /* If the previous use of the registers was a media op, then their latency will be less than previously recorded. -- 2.43.0