From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id B596F385DDDB for ; Tue, 11 Jun 2024 11:21:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B596F385DDDB Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B596F385DDDB Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718104895; cv=none; b=DtozLLs0ndD8CLYv2qNwy7lxsidJmWe1Gy4c5h1a+iPrtY6omCg2G2DNuofh14KXJgEVZodHPgb2P8Tk5ClbeaxWNVCHG86hlxAuWNVolrQEdNJZ5VKXkFmsg1l23SDm+LbGy+CM2BFMk0hYzcT1hiQKQJjzce1rbExDjnuswgU= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718104895; c=relaxed/simple; bh=RCxKvN/dVADUjvyntE3GA6Jy86/EmUWzRdfDVkNZ15M=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=AhSciuY9b/nU0c3RZDrwZokwSITv0PN1yK94SeS+LxwU3fpD9K8LH1t0TICfbKaEvLwekuViM1B2NWdFtbCQ+PNYJ1yXQq/tezDoj1jIXloq/PXu0xSDnz/+FI7NW2VXAyk8vH7mmWy+4hY6AfAgEajQXGV/eSzSeU2eWsEuGsY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8AxnOo4M2hmc6QFAA--.22938S3; Tue, 11 Jun 2024 19:21:29 +0800 (CST) Received: from localhost.localdomain (unknown [113.200.148.30]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxusY2M2hmBPAbAA--.3448S2; Tue, 11 Jun 2024 19:21:27 +0800 (CST) From: Hui Li To: gdb-patches@sourceware.org Cc: Tiezhu Yang Subject: [PATCH v2 0/2] gdb: LoongArch: Add support for hardware watchpoint & breakpoint Date: Tue, 11 Jun 2024 19:21:24 +0800 Message-Id: <20240611112126.4882-1-lihui@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8DxusY2M2hmBPAbAA--.3448S2 X-CM-SenderInfo: 5olk3xo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBj93XoW7Ary5XFW8Cr1Utry8CFykJFc_yoW8Aw4Dpa y3CF1ftr4UGrZrXFZxJ34UZr15JFn7CrW2qa13tryjk3y2qr1F9r1rKr90v3Z8Cw18tFyF qr18Kw10gFnrAFgCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07UE-erUUUUU= X-Spam-Status: No, score=-6.1 required=5.0 tests=BAYES_00,KAM_DMARC_STATUS,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: LoongArch defines hardware watchpoint functions for fetch and load/store operations. After the software configures the watchpoints for fetch and load/store, the processor hardware will monitor the access addresses of the fetch and load/store operations and trigger a watchpoint exception when the watchpoint setting conditions are met. After this series, watch/rwatch/awatch/hbreak command are supported. Refer to the following document for hardware watchpoint and breakpoint: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints Changes v1 -> v2: - Fixed some code format. - Use PLV3 privilege level in ctrl register to enable hardware breakpoint/watchpoint. Hui Li (2): gdb: LoongArch: Add support for hardware watchpoint gdb: LoongArch: Add support for hardware breakpoint gdb/Makefile.in | 3 + gdb/configure.nat | 4 +- gdb/loongarch-linux-nat.c | 351 +++++++++++++++++++++++++++++ gdb/loongarch-tdep.c | 1 + gdb/nat/loongarch-hw-point.c | 320 ++++++++++++++++++++++++++ gdb/nat/loongarch-hw-point.h | 103 +++++++++ gdb/nat/loongarch-linux-hw-point.c | 252 +++++++++++++++++++++ gdb/nat/loongarch-linux-hw-point.h | 126 +++++++++++ gdb/nat/loongarch-linux.c | 100 ++++++++ gdb/nat/loongarch-linux.h | 42 ++++ include/elf/common.h | 4 + 11 files changed, 1305 insertions(+), 1 deletion(-) create mode 100644 gdb/nat/loongarch-hw-point.c create mode 100644 gdb/nat/loongarch-hw-point.h create mode 100644 gdb/nat/loongarch-linux-hw-point.c create mode 100644 gdb/nat/loongarch-linux-hw-point.h create mode 100644 gdb/nat/loongarch-linux.c create mode 100644 gdb/nat/loongarch-linux.h -- 2.38.1