diff --git a/sim/mcore/.interp.c.swp b/sim/mcore/.interp.c.swp
new file mode 100644
index 00000000000..a11d2df9077
Binary files /dev/null and b/sim/mcore/.interp.c.swp differ
diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c
index 48d9ff8645a..0bbb2c399b2 100644
--- a/sim/mcore/interp.c
+++ b/sim/mcore/interp.c
@@ -1060,7 +1060,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case 0x3E: case 0x3F:				/* lsrc, lsri */
 	  {
 	    unsigned imm = IMM5;
-	    unsigned long tmp = gr[RD];
+	    uint32_t tmp = gr[RD];
 	    if (imm == 0)
 	      {
 		NEW_C (tmp);
diff --git a/sim/testsuite/mcore/lsri.s b/sim/testsuite/mcore/lsri.s
new file mode 100644
index 00000000000..fe15213d6b0
--- /dev/null
+++ b/sim/testsuite/mcore/lsri.s
@@ -0,0 +1,21 @@
+# check that sext.b/sext.h work correctly
+# mach: mcore
+
+.include "testutils.inc"
+
+	start
+	# Construct -1
+	bmaski	r2, 32
+
+	# logical shift right by 24
+	lsri	r2, 24
+
+	# Construct 255
+	bmaski	r1, 8
+
+	# Compare them, they should be equal
+	cmpne	r2,r1
+	jbt	.L1
+	pass
+.L1:
+	fail