From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Andreas Schwab <schwab@suse.de>, gdb-patches@sourceware.org
Subject: Re: [PATCH 2/2] gdb/riscv: Fix buffer overflow on riscv_insn::fetch_instruction
Date: Tue, 4 Oct 2022 18:14:55 +0900 [thread overview]
Message-ID: <29872020-9f00-b639-717e-a31a3e614210@irq.a4lg.com> (raw)
In-Reply-To: <mvm1qrohscy.fsf@suse.de>
On 2022/10/04 18:04, Andreas Schwab wrote:
> On Okt 04 2022, Tsukasa OI via Gdb-patches wrote:
>
>> diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
>> index 47d8f9e601b..99307bd2de1 100644
>> --- a/gdb/riscv-tdep.c
>> +++ b/gdb/riscv-tdep.c
>> @@ -1770,7 +1770,7 @@ riscv_insn::fetch_instruction (struct gdbarch *gdbarch,
>> CORE_ADDR addr, int *len)
>> {
>> enum bfd_endian byte_order = gdbarch_byte_order_for_code (gdbarch);
>> - gdb_byte buf[8];
>> + gdb_byte buf[22];
>
> Can the magic number be derived from something else so that is adapts
> automatically?
>
Well...
That's technically possible but it will make something like...
8 + 2 + 2 * ((1 << 3) - 1 - 1)
and I don't think that would improve something (it heavily depends on
the encoding magic [no relevant constants are defined so far] so it's
just "from magic to magic").
Defining RISCV_MAX_INSN_LEN might be a slightly better solution (still,
content of RISCV_MAX_INSN_LEN will be a magic number).
Thanks,
Tsukasa
next prev parent reply other threads:[~2022-10-04 9:14 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-04 8:59 [PATCH 0/2] RISC-V: Fix buffer overflow after long instruction support Tsukasa OI
2022-10-04 8:59 ` [PATCH 1/2] RISC-V: Fix buffer overflow on print_insn_riscv Tsukasa OI
2022-10-04 8:59 ` [PATCH 2/2] gdb/riscv: Fix buffer overflow on riscv_insn::fetch_instruction Tsukasa OI
2022-10-04 9:04 ` Andreas Schwab
2022-10-04 9:14 ` Tsukasa OI [this message]
2022-10-04 9:25 ` Andreas Schwab
2022-10-04 9:28 ` Tsukasa OI
2022-10-04 9:07 ` [PATCH 0/2] RISC-V: Fix buffer overflow after long instruction support Jan Beulich
2022-10-04 9:26 ` Tsukasa OI
2022-10-04 9:44 ` Jan Beulich
2022-10-04 9:47 ` Tsukasa OI
2022-10-04 9:45 ` [PATCH v2 0/2] RISC-V: Fix buffer overflow after 176-bit " Tsukasa OI
2022-10-04 9:45 ` [PATCH v2 1/2] RISC-V: Fix buffer overflow on print_insn_riscv Tsukasa OI
2022-10-04 9:58 ` Jan Beulich
2022-10-04 10:13 ` Tsukasa OI
2022-10-04 10:16 ` Jan Beulich
2022-10-04 10:18 ` Jan Beulich
2022-10-04 9:45 ` [PATCH v2 2/2] gdb/riscv: Partial support for instructions up to 176-bits Tsukasa OI
2022-10-04 11:25 ` [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit instruction support Tsukasa OI
2022-10-04 11:25 ` [PATCH v3 1/2] RISC-V: Fix buffer overflow on print_insn_riscv Tsukasa OI
2022-10-04 11:25 ` [PATCH v3 2/2] gdb/riscv: Partial support for instructions up to 176-bit Tsukasa OI
2022-10-04 12:23 ` [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit instruction support Jan Beulich
2022-10-04 13:20 ` Nelson Chu
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