From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130077.outbound.protection.outlook.com [40.107.13.77]) by sourceware.org (Postfix) with ESMTPS id B67BD3857BB1 for ; Mon, 8 Aug 2022 11:35:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B67BD3857BB1 ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=WUm9glqRWQVrHZVZr8ckUNaGn/bRTGRkTK2STxKjVVYdT2r4decQ2JqmUVza2Nu/38Ym9cLn9UYxhpdFmCVlq8Psq/0+HoxePTihVoZw/F/uSIW6CquKFwulJYyT8KTSdrFr26oNi7FqKp/3F7egQOgPU+E21T/eEfcedGmw/hrYC1BxI5sGaAOrCmXWyGI2QVz/pbPXjeLQ+Zl13/ZoGWZo4/fqAfJrgiD3gi1rt3YPyHdWtNhG6J3M0RrUzUOYqCvMMdRAMFmUgmKISRx1P2AebVvUsJB6Yhb9g7dClxSXbgjYdYVgItG7ESZmT/ge3O187+HonlL71YGI68EFZg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6yxQ4POFJZU1SQgGpgxoJfADCtKRErh3yO5kWBLzZRo=; b=AO01vlSxwuivwCH4iA+4HaCVm1/qacvmBsZ6fcB25dCUMB6psyH57S2Fgj933HNGsQ38ioTCP1B3aZR86K4xfk5/TDcm8WDMVE8rv/yFbjA9rAclaOGoNUKYRQRK7lMOQhoDnEvmR/B1Wxo5bbM3ZydJ6/ZcyQGam1FYS5GW9hZbD8DwXP9DBPN7J2u2dgtgI6rvyL90fAF2H+WiW7YS4nEjeZs/b1rtyQN2+F69PPLEyPnWbp8CITsyQXgOecXpus9rIt/uezoiAUthdzxgzNlbqrXijT8Q9GO/RiyH85yiMyLtso/Bhvovl+MMOalSYgc/3Vwptw97ATvSgdOaFA== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=temperror (sender ip is 63.35.35.123) smtp.rcpttodomain=sourceware.org smtp.mailfrom=arm.com; dmarc=temperror action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dkim=[1,1,header.d=arm.com] dmarc=[1,1,header.from=arm.com]) Received: from AM6PR10CA0099.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:209:8c::40) by DBBPR08MB4473.eurprd08.prod.outlook.com (2603:10a6:10:ce::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.18; Mon, 8 Aug 2022 11:35:03 +0000 Received: from VE1EUR03FT060.eop-EUR03.prod.protection.outlook.com (2603:10a6:209:8c:cafe::fe) by AM6PR10CA0099.outlook.office365.com (2603:10a6:209:8c::40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.14 via Frontend Transport; Mon, 8 Aug 2022 11:35:02 +0000 X-MS-Exchange-Authentication-Results: spf=temperror (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=temperror action=none header.from=arm.com; Received-SPF: TempError (protection.outlook.com: error in processing during lookup of arm.com: DNS Timeout) Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by VE1EUR03FT060.mail.protection.outlook.com (10.152.19.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.16 via Frontend Transport; Mon, 8 Aug 2022 11:35:01 +0000 Received: ("Tessian outbound fccf984e7173:v123"); Mon, 08 Aug 2022 11:35:00 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: a232445fadc41a24 X-CR-MTA-TID: 64aa7808 Received: from 5cd5ac008047.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 0A376BA8-F04F-4F56-B5DD-DE3194B7D648.1; Mon, 08 Aug 2022 11:34:54 +0000 Received: from EUR03-VE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 5cd5ac008047.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Mon, 08 Aug 2022 11:34:54 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=S8FloYc1xht2ASmm1QxEnn8+d5EJiDRbUmvWKnk0xfWsFmOf27et6gadvkZtuXOG7YvF1GuInrtPmlBKyORmiOgKNMk5/UxgwVVdNoxyvsb/SCbPf/pbvbh9Z5S2LMP5hsknXaX3G2Z+m6vwNy70CsVBPCyNTbYxZaEjT3Eol6e4j/BdgbxcIKRFo9mnRgVRWmpZ1/4UIixJNWccC1nIO6wfbTzAGq/tSMeu5OtmPKJkjO6KKJihec3APAwKMnzDwGEzakPGMXTnXG92IjS2dWdWiSkW7waqPuiLza8zLzCdO+SVj4GWwhluA4sbyLovw6Z2938p9gGH/OXKnIXaTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6yxQ4POFJZU1SQgGpgxoJfADCtKRErh3yO5kWBLzZRo=; b=WtzaQ4TyyUipl+bj6vx09EAdAkZnld72S4k160ovfzo+yW0IcO9MNqeusmUX1ZPlXGwGTWJbgKeTCL1BIuD8BqEDDbNyyM5yhkrO3EYay+CZgCcrw4atmcItmO05qcl+u6Pj5T8LMaHkBEk4mPNpNbk0lHmi3wvjzhQkzP+SfpPdcAGVw2ZA4/WBykX5jPOX4GmuWJvVYGXRaQJV/Bo9upByB+V9qqWhlMy5X5WdTUWzf5JFNvH6zXoLtacT5UkzCM0H809GbZm//+NYnrzLigM55hPD1WwqBKHdOrIvaKusu7REGnjPHFF0UY14aK+EYCijyUv8xySttFMxeORbig== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; Received: from VI1PR08MB3919.eurprd08.prod.outlook.com (2603:10a6:803:c4::31) by DBAPR08MB5800.eurprd08.prod.outlook.com (2603:10a6:10:1a9::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.16; Mon, 8 Aug 2022 11:34:51 +0000 Received: from VI1PR08MB3919.eurprd08.prod.outlook.com ([fe80::cc64:9170:b12d:de8]) by VI1PR08MB3919.eurprd08.prod.outlook.com ([fe80::cc64:9170:b12d:de8%4]) with mapi id 15.20.5504.019; Mon, 8 Aug 2022 11:34:51 +0000 Message-ID: <2c2a6dca-a46e-02c8-c54f-40e50cec3af4@arm.com> Date: Mon, 8 Aug 2022 12:34:50 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: [Ping v3][PATCH,v2] [aarch64] Fix removal of non-address bits for PAuth Content-Language: en-US To: gdb-patches@sourceware.org Cc: lsix@lancelotsix.com References: <20220705140037.135012-1-luis.machado@arm.com> <20220711115534.23810-1-luis.machado@arm.com> From: Luis Machado In-Reply-To: <20220711115534.23810-1-luis.machado@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: LNXP123CA0016.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:d2::28) To VI1PR08MB3919.eurprd08.prod.outlook.com (2603:10a6:803:c4::31) MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 39001b9e-61dd-4c2b-ae69-08da793207e8 X-MS-TrafficTypeDiagnostic: DBAPR08MB5800:EE_|VE1EUR03FT060:EE_|DBBPR08MB4473:EE_ x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: 2JUCcnM6OrV6zi7wV69tez9hRDss4+fL97RZGvIqrE8z85ZZ4NYNmnC5Ljp1y3mV9N4j8QHa2O9fxEHCSQ7LBoAvOOrGGtrL1SLxSaY8YuExTddpUcZKYQt7eZcRSZLoXUV8P1A9nVFdpjxLBtNAagXbd9Ihoz6ES/gcXcLkDLigenjj7RZrsVEJcLQxdcmVXdgT1bNEmQHjMoGUcmfmDt5cm53JytMG1s6ZKI3tktCRpWinI7bVb/exL1rNKqC2G+2tJ9AUGb+m07muhestKFVnGYilh4BYezSeEvnu4HY9oQF5nNzMhOmMnzRhyeNeuqqRpfgTG4dZIIofHGM3ZegUTIp2Qwm8b6P9oMWz8Ao8CTBYJlvc9WemWoNCTkUB4gtiiRbvblZTMNi6oGtRVKkdQayMlfT1DZX0aJ3m8515sOnrk8zmEh2lHCUzj7yUb8lTO2LfnyDL53e/O7yx4kuRCsgmoDGGQ/M9N6CX92kD9f0kMHdbjeyOW9v2lM+75pkefGff1Bsr+mn/q58lAPHL7N7ZBVblp8OkhMnNNKBIL3VjnNv2nVEP7pYjQkya2aI9fGsHWg1fhzEt15oqWjMgoPbI5+jY47zPQJndjc3U4eMvI6d+rtNIQKPrQgFFMd4qwM+83pNbO5aRtP9Kw5t6iWB3oVnkvyICFKvPyDzxBc3wsd0AHgKBQR/o1tut8v8u2Wbw19NKqS141yWFVkwK4hUJYTfai+5ufV1dTQvA+P/3BbLw8WMs1GG0BjkI2MrY2y+u04i9e1A3Nfs5DJhd7KZqzlUjGFCCsfaGkufsuW+ouDeRVl5GqdyfuRCoJZ8b8INOYT3YCVRi+eMdnO8n30YY6uXX/J7TpA0jYBxluS7btLrehE5Th8fOPW5HGb8kMeF2nJXTSyUorGxtmU+LPF/36yIZ80CJu6xNIoM= X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR08MB3919.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230016)(4636009)(136003)(39850400004)(376002)(366004)(346002)(396003)(44832011)(30864003)(5660300002)(2906002)(66946007)(36756003)(6486002)(6916009)(966005)(316002)(478600001)(31686004)(8936002)(41300700001)(38100700002)(26005)(84970400001)(86362001)(31696002)(53546011)(6506007)(6512007)(8676002)(4326008)(66476007)(66556008)(186003)(2616005)(83380400001)(2004002)(43740500002)(45980500001); DIR:OUT; SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR08MB5800 Original-Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT060.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: f25c284e-865a-4808-bed1-08da793201fd X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: =?utf-8?B?RmtVZGRQOUJJK0Uya3R6KzhYUHo3SmRUMWYyeG1FZE9JRnlaaFVOZWtLby9m?= =?utf-8?B?YlE0RFZ4ckNtMHkvRU5oTWZESkZKM09GclFEM2YwUUVDU2RuRjk0L0pxY255?= =?utf-8?B?RE9rRTM2TGFzcEpkUXNHWTdMcjFIYzN5OHRVYmdJTm0vajZRbjVObGpkWjdE?= =?utf-8?B?aTNFTGN4SzkwNzFHQkpHZUlJNWJuMlh3clp0TVF3dFVBVnY0NnZVZTRnR3RK?= =?utf-8?B?djVHeGZINktHTXZZQTVwZWlsNDFqeVp6UlBwbHF6aEJFNUdSMGtTcHdZOGpB?= =?utf-8?B?TEhhUU1NUzBMTTF5TGZEKzVWSGNEUERMWUE0OWZTOGVnS3BDMVNIc05aVTUz?= =?utf-8?B?WWN0cFZuU2pCeFBOWDZiR2prTkdnd1pJVTJKaXQ3VHR2TGMrT2cvTitxNEJ0?= =?utf-8?B?TFVhMzNoVkdiUXZadjlEMGgvcEhENFB5bnczaHdlOGNPR3REcXJMLzQwRFoz?= =?utf-8?B?NUVSWU5KMWRVdW9zaVg3Vm85QjJHbFFtaHd1c3NiU3BBdDIrV2hQdHRvYlpH?= =?utf-8?B?TXkzcFBUT0RLSlUyd3lHd2Q0WGNjaTRtU0lKQ0VPcHlEenZ6OTFzMXV3Mk1t?= =?utf-8?B?dk5YNk1pRjhsSEUwRFBZVWhiZm95Z2RiWnJOSnBYaG5TcDFyeUtHQStHeGMw?= =?utf-8?B?Z2RXZkdUVTFHVmRLZkVpdUdzUEJIdlFYZk5nbFFsc1hIdjlMem1YVUlZeVpk?= =?utf-8?B?K3NCZWkvc3hNckg3R1luU096eGdkdnFKS1g2NlUyaWlNMFMzU2IxZXhsNmJn?= =?utf-8?B?OWRsVEJVQ0kycDNvSDdnSEdqYUVUWDc0TjFscDJHNERuZmxpc1NiWHB2Qjha?= =?utf-8?B?L0pMalNVblNTQ2JLaU94Z0lJalNtYzdQaFBkUlpHdis4cUVVSzcvTkVqZ1lw?= =?utf-8?B?L2J3TUhJQkRlVEJ0OXZmOEQ3TnRENEw3ajJidG5XdHZaTTlKem1zT0FHclI2?= =?utf-8?B?c0Nwcm9OU0d1aEZhc1FxOE1GVVAxcGJNczUzeXF3ampwc01YbGFpUmlYTmpz?= =?utf-8?B?SENOVEsrRTQ0QXJObGQyOXBrNE1Mb1BEei9HUGd5WDd5R1dIZFhRQUl4QVRj?= =?utf-8?B?QVVqem1Gbm82eHlXU0RUU3JhalRZNHBpc1dMMTNwNURlek9XR0hhRFhXbEpQ?= =?utf-8?B?dFVmbTRpMzVYT1NRWDdpaDFTbmxuQUpSd2RIK1VJWFcrOTBVQWYwcDFEWVB4?= =?utf-8?B?MEkwV3lGNUhtbXVJQ290ckRHbEZWT0lYK2lTN0kyMlMyN0x2aDBhYkx4d3g1?= =?utf-8?B?QXNLMndRalZPaFRiSENYQ3lodFExc2lJeHVuUHFGdUowUTQ4Zz09?= X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230016)(4636009)(346002)(39860400002)(136003)(376002)(396003)(46966006)(36840700001)(40470700004)(5660300002)(70206006)(70586007)(40460700003)(4326008)(8676002)(6916009)(316002)(31696002)(86362001)(82310400005)(36756003)(84970400001)(40480700001)(44832011)(8936002)(30864003)(36860700001)(83380400001)(2906002)(6486002)(63350400001)(31686004)(81166007)(356005)(82740400003)(26005)(41300700001)(6512007)(6506007)(186003)(478600001)(47076005)(53546011)(336012)(966005)(63370400001)(2616005)(107886003)(2004002)(45980500001)(43740500002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Aug 2022 11:35:01.2964 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 39001b9e-61dd-4c2b-ae69-08da793207e8 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT060.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB4473 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Aug 2022 11:35:14 -0000 On 7/11/22 12:55, Luis Machado via Gdb-patches wrote: > v2: > > - Renamed aarch64_remove_top_bytes to aarch64_remove_top_bits > - Formatting issues. > > -- > > The address_significant gdbarch setting was introduced as a way to remove > non-address bits from pointers, and it is specified by a constant. This > constant represents the number of address bits in a pointer. > > Right now AArch64 is the only architecture that uses it, and 56 was a > correct option so far. > > But if we are using Pointer Authentication (PAuth), we might use up to 2 bytes > from the address space to store the required information. We could also have > cases where we're using both PAuth and MTE. > > We could adjust the constant to 48 to cover those cases, but this doesn't > cover the case where GDB needs to sign-extend kernel addresses after removal > of the non-address bits. > > This has worked so far because bit 55 is used to select between kernel-space > and user-space addresses. But trying to clear a range of bits crossing the > bit 55 boundary requires the hook to be smarter. > > The following patch renames the gdbarch hook from significant_addr_bit to > remove_non_address_bits and passes a pointer as opposed to the number of > bits. The hook is now responsible for removing the required non-address bits > and sign-extending the address if needed. > > While at it, make GDB and GDBServer share some more code for aarch64 and add a > new arch-specific testcase gdb.arch/aarch64-non-address-bits.exp. > > Bug-url: https://sourceware.org/bugzilla/show_bug.cgi?id=28947 > --- > gdb/aarch64-linux-nat.c | 2 +- > gdb/aarch64-linux-tdep.c | 57 ++++++++- > gdb/arch-utils.c | 8 ++ > gdb/arch-utils.h | 4 + > gdb/arch/aarch64.c | 19 +++ > gdb/arch/aarch64.h | 9 ++ > gdb/breakpoint.c | 6 +- > gdb/gdbarch-components.py | 20 ++- > gdb/gdbarch-gen.h | 19 ++- > gdb/gdbarch.c | 25 ++-- > gdb/target.c | 2 +- > .../gdb.arch/aarch64-non-address-bits.c | 25 ++++ > .../gdb.arch/aarch64-non-address-bits.exp | 121 ++++++++++++++++++ > gdb/utils.c | 22 ---- > gdb/utils.h | 3 - > gdbserver/linux-aarch64-low.cc | 40 ++++-- > 16 files changed, 309 insertions(+), 73 deletions(-) > create mode 100644 gdb/testsuite/gdb.arch/aarch64-non-address-bits.c > create mode 100644 gdb/testsuite/gdb.arch/aarch64-non-address-bits.exp > > diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c > index d58ad0143a2..3f41aae188e 100644 > --- a/gdb/aarch64-linux-nat.c > +++ b/gdb/aarch64-linux-nat.c > @@ -843,7 +843,7 @@ aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p) > kernel can potentially be tagged addresses. */ > struct gdbarch *gdbarch = thread_architecture (inferior_ptid); > const CORE_ADDR addr_trap > - = address_significant (gdbarch, (CORE_ADDR) siginfo.si_addr); > + = gdbarch_remove_non_address_bits (gdbarch, (CORE_ADDR) siginfo.si_addr); > > /* Check if the address matches any watched address. */ > state = aarch64_get_debug_reg_state (inferior_ptid.pid ()); > diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c > index 453692df2f4..fffeb6f3df7 100644 > --- a/gdb/aarch64-linux-tdep.c > +++ b/gdb/aarch64-linux-tdep.c > @@ -1586,7 +1586,7 @@ aarch64_linux_tagged_address_p (struct gdbarch *gdbarch, struct value *address) > CORE_ADDR addr = value_as_address (address); > > /* Remove the top byte for the memory range check. */ > - addr = address_significant (gdbarch, addr); > + addr = gdbarch_remove_non_address_bits (gdbarch, addr); > > /* Check if the page that contains ADDRESS is mapped with PROT_MTE. */ > if (!linux_address_in_memtag_page (addr)) > @@ -1612,7 +1612,7 @@ aarch64_linux_memtag_matches_p (struct gdbarch *gdbarch, > > /* Fetch the allocation tag for ADDRESS. */ > gdb::optional atag > - = aarch64_mte_get_atag (address_significant (gdbarch, addr)); > + = aarch64_mte_get_atag (gdbarch_remove_non_address_bits (gdbarch, addr)); > > if (!atag.has_value ()) > return true; > @@ -1651,7 +1651,7 @@ aarch64_linux_set_memtags (struct gdbarch *gdbarch, struct value *address, > else > { > /* Remove the top byte. */ > - addr = address_significant (gdbarch, addr); > + addr = gdbarch_remove_non_address_bits (gdbarch, addr); > > /* Make sure we are dealing with a tagged address to begin with. */ > if (!aarch64_linux_tagged_address_p (gdbarch, address)) > @@ -1708,7 +1708,7 @@ aarch64_linux_get_memtag (struct gdbarch *gdbarch, struct value *address, > return nullptr; > > /* Remove the top byte. */ > - addr = address_significant (gdbarch, addr); > + addr = gdbarch_remove_non_address_bits (gdbarch, addr); > gdb::optional atag = aarch64_mte_get_atag (addr); > > if (!atag.has_value ()) > @@ -1782,7 +1782,8 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch, > uiout->text ("\n"); > > gdb::optional atag > - = aarch64_mte_get_atag (address_significant (gdbarch, fault_addr)); > + = aarch64_mte_get_atag (gdbarch_remove_non_address_bits (gdbarch, > + fault_addr)); > gdb_byte ltag = aarch64_mte_get_ltag (fault_addr); > > if (!atag.has_value ()) > @@ -1803,6 +1804,49 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch, > } > } > > +/* AArch64 implementation of the remove_non_address_bits gdbarch hook. Remove > + non address bits from a pointer value. */ > + > +static CORE_ADDR > +aarch64_remove_non_address_bits (struct gdbarch *gdbarch, CORE_ADDR pointer) > +{ > + aarch64_gdbarch_tdep *tdep > + = (aarch64_gdbarch_tdep *) gdbarch_tdep (gdbarch); > + > + /* By default, we assume TBI and discard the top 8 bits plus the VA range > + select bit (55). */ > + CORE_ADDR mask = (((CORE_ADDR) 1) << (64 - 9)) - 1; > + mask = ~mask; > + > + if (tdep->has_pauth ()) > + { > + /* Fetch the PAC masks. These masks are per-process, so we can just > + fetch data from whatever thread we have at the moment. > + > + Also, we have both a code mask and a data mask. For now they are the > + same, but this may change in the future. */ > + struct regcache *regs = get_current_regcache (); > + CORE_ADDR cmask, dmask; > + > + if (regs->cooked_read (tdep->pauth_reg_base, &dmask) != REG_VALID) > + dmask = mask; > + > + if (regs->cooked_read (tdep->pauth_reg_base + 1, &cmask) != REG_VALID) > + cmask = mask; > + > + if (dmask != cmask) > + { > + /* Warn if the masks are different. */ > + warning (_("C mask and D mask differ")); > + mask |= dmask > cmask? dmask : cmask; > + } > + else > + mask |= cmask; > + } > + > + return aarch64_remove_top_bits (pointer, mask); > +} > + > static void > aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) > { > @@ -1858,7 +1902,8 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) > /* The top byte of a user space address known as the "tag", > is ignored by the kernel and can be regarded as additional > data associated with the address. */ > - set_gdbarch_significant_addr_bit (gdbarch, 56); > + set_gdbarch_remove_non_address_bits (gdbarch, > + aarch64_remove_non_address_bits); > > /* MTE-specific settings and hooks. */ > if (tdep->has_mte ()) > diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c > index ff946ee3767..db77dc44c74 100644 > --- a/gdb/arch-utils.c > +++ b/gdb/arch-utils.c > @@ -82,6 +82,14 @@ legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum) > return LEGACY_SIM_REGNO_IGNORE; > } > > +/* See arch-utils.h */ > + > +CORE_ADDR > +default_remove_non_address_bits (struct gdbarch *gdbarch, CORE_ADDR pointer) > +{ > + /* By default, just return the pointer value. */ > + return pointer; > +} > > /* See arch-utils.h */ > > diff --git a/gdb/arch-utils.h b/gdb/arch-utils.h > index f850e5fd6e7..e117599b171 100644 > --- a/gdb/arch-utils.h > +++ b/gdb/arch-utils.h > @@ -132,6 +132,10 @@ extern const struct floatformat ** > default_floatformat_for_type (struct gdbarch *gdbarch, > const char *name, int len); > > +/* Default implementation of gdbarch_remove_non_address_bits. */ > +CORE_ADDR default_remove_non_address_bits (struct gdbarch *gdbarch, > + CORE_ADDR pointer); > + > /* Default implementation of gdbarch_memtag_to_string. */ > extern std::string default_memtag_to_string (struct gdbarch *gdbarch, > struct value *tag); > diff --git a/gdb/arch/aarch64.c b/gdb/arch/aarch64.c > index 0f73286f145..120664b5fdf 100644 > --- a/gdb/arch/aarch64.c > +++ b/gdb/arch/aarch64.c > @@ -58,3 +58,22 @@ aarch64_create_target_description (const aarch64_features &features) > > return tdesc.release (); > } > + > +/* See arch/aarch64.h. */ > + > +CORE_ADDR > +aarch64_remove_top_bits (CORE_ADDR pointer, CORE_ADDR mask) > +{ > + /* The VA range select bit is 55. This bit tells us if we have a > + kernel-space address or a user-space address. */ > + bool kernel_address = (pointer & VA_RANGE_SELECT_BIT_MASK) != 0; > + > + /* Remove the top non-address bits. */ > + pointer &= ~mask; > + > + /* Sign-extend if we have a kernel-space address. */ > + if (kernel_address) > + pointer |= mask; > + > + return pointer; > +} > diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h > index 8e3fd36726a..f2589666a1e 100644 > --- a/gdb/arch/aarch64.h > +++ b/gdb/arch/aarch64.h > @@ -67,6 +67,12 @@ namespace std > target_desc * > aarch64_create_target_description (const aarch64_features &features); > > +/* Given a pointer value POINTER and a MASK of non-address bits, remove the > + non-address bits from the pointer and sign-extend the result if required. > + The sign-extension is required so we can handle kernel addresses > + correctly. */ > +CORE_ADDR aarch64_remove_top_bits (CORE_ADDR pointer, CORE_ADDR mask); > + > /* Register numbers of various important registers. > Note that on SVE, the Z registers reuse the V register numbers and the V > registers become pseudo registers. */ > @@ -96,6 +102,9 @@ enum aarch64_regnum > AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7 > }; > > +/* Bit 55 is used to select between a kernel-space and user-space address. */ > +#define VA_RANGE_SELECT_BIT_MASK 0x80000000000000 > + > #define V_REGISTER_SIZE 16 > > /* Pseudo register base numbers. */ > diff --git a/gdb/breakpoint.c b/gdb/breakpoint.c > index a3be12557f6..c7ccb6c4f0d 100644 > --- a/gdb/breakpoint.c > +++ b/gdb/breakpoint.c > @@ -2113,7 +2113,8 @@ update_watchpoint (struct watchpoint *b, int reparse) > loc->gdbarch = value_type (v)->arch (); > > loc->pspace = frame_pspace; > - loc->address = address_significant (loc->gdbarch, addr); > + loc->address > + = gdbarch_remove_non_address_bits (loc->gdbarch, addr); > > if (bitsize != 0) > { > @@ -7136,7 +7137,8 @@ adjust_breakpoint_address (struct gdbarch *gdbarch, > adjusted_bpaddr = gdbarch_adjust_breakpoint_address (gdbarch, bpaddr); > } > > - adjusted_bpaddr = address_significant (gdbarch, adjusted_bpaddr); > + adjusted_bpaddr > + = gdbarch_remove_non_address_bits (gdbarch, adjusted_bpaddr); > > /* An adjusted breakpoint address can significantly alter > a user's expectations. Print a warning if an adjustment > diff --git a/gdb/gdbarch-components.py b/gdb/gdbarch-components.py > index fc10e8600ba..c6836b63c50 100644 > --- a/gdb/gdbarch-components.py > +++ b/gdb/gdbarch-components.py > @@ -1116,15 +1116,21 @@ possible it should be in TARGET_READ_PC instead). > invalid=False, > ) > > -Value( > +Method( > comment=""" > -On some machines, not all bits of an address word are significant. > -For example, on AArch64, the top bits of an address known as the "tag" > -are ignored by the kernel, the hardware, etc. and can be regarded as > -additional data associated with the address. > +On some architectures, not all bits of a pointer are significant. > +On AArch64, for example, the top bits of a pointer may carry a "tag", which > +can be ignored by the kernel and the hardware. The "tag" can be regarded as > +additional data associated with the pointer, but it is not part of the address. > + > +Given a pointer for the architecture, this hook removes all the > +non-significant bits and sign-extends things as needed. It is used mostly > +for data pointers, as opposed to code pointers. > """, > - type="int", > - name="significant_addr_bit", > + type="CORE_ADDR", > + name="remove_non_address_bits", > + params=[("CORE_ADDR", "pointer")], > + predefault="default_remove_non_address_bits", > invalid=False, > ) > > diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h > index ddcb4c55615..64930f7f239 100644 > --- a/gdb/gdbarch-gen.h > +++ b/gdb/gdbarch-gen.h > @@ -609,13 +609,18 @@ typedef CORE_ADDR (gdbarch_addr_bits_remove_ftype) (struct gdbarch *gdbarch, COR > extern CORE_ADDR gdbarch_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr); > extern void set_gdbarch_addr_bits_remove (struct gdbarch *gdbarch, gdbarch_addr_bits_remove_ftype *addr_bits_remove); > > -/* On some machines, not all bits of an address word are significant. > - For example, on AArch64, the top bits of an address known as the "tag" > - are ignored by the kernel, the hardware, etc. and can be regarded as > - additional data associated with the address. */ > - > -extern int gdbarch_significant_addr_bit (struct gdbarch *gdbarch); > -extern void set_gdbarch_significant_addr_bit (struct gdbarch *gdbarch, int significant_addr_bit); > +/* On some architectures, not all bits of a pointer are significant. > + On AArch64, for example, the top bits of a pointer may carry a "tag", which > + can be ignored by the kernel and the hardware. The "tag" can be regarded as > + additional data associated with the pointer, but it is not part of the address. > + > + Given a pointer for the architecture, this hook removes all the > + non-significant bits and sign-extends things as needed. It is used mostly > + for data pointers, as opposed to code pointers. */ > + > +typedef CORE_ADDR (gdbarch_remove_non_address_bits_ftype) (struct gdbarch *gdbarch, CORE_ADDR pointer); > +extern CORE_ADDR gdbarch_remove_non_address_bits (struct gdbarch *gdbarch, CORE_ADDR pointer); > +extern void set_gdbarch_remove_non_address_bits (struct gdbarch *gdbarch, gdbarch_remove_non_address_bits_ftype *remove_non_address_bits); > > /* Return a string representation of the memory tag TAG. */ > > diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c > index 68ef0480219..d536d8578af 100644 > --- a/gdb/gdbarch.c > +++ b/gdb/gdbarch.c > @@ -140,7 +140,7 @@ struct gdbarch > int frame_red_zone_size; > gdbarch_convert_from_func_ptr_addr_ftype *convert_from_func_ptr_addr; > gdbarch_addr_bits_remove_ftype *addr_bits_remove; > - int significant_addr_bit; > + gdbarch_remove_non_address_bits_ftype *remove_non_address_bits; > gdbarch_memtag_to_string_ftype *memtag_to_string; > gdbarch_tagged_address_p_ftype *tagged_address_p; > gdbarch_memtag_matches_p_ftype *memtag_matches_p; > @@ -327,6 +327,7 @@ gdbarch_alloc (const struct gdbarch_info *info, > gdbarch->stabs_argument_has_addr = default_stabs_argument_has_addr; > gdbarch->convert_from_func_ptr_addr = convert_from_func_ptr_addr_identity; > gdbarch->addr_bits_remove = core_addr_identity; > + gdbarch->remove_non_address_bits = default_remove_non_address_bits; > gdbarch->memtag_to_string = default_memtag_to_string; > gdbarch->tagged_address_p = default_tagged_address_p; > gdbarch->memtag_matches_p = default_memtag_matches_p; > @@ -496,7 +497,7 @@ verify_gdbarch (struct gdbarch *gdbarch) > /* Skip verify of frame_red_zone_size, invalid_p == 0 */ > /* Skip verify of convert_from_func_ptr_addr, invalid_p == 0 */ > /* Skip verify of addr_bits_remove, invalid_p == 0 */ > - /* Skip verify of significant_addr_bit, invalid_p == 0 */ > + /* Skip verify of remove_non_address_bits, invalid_p == 0 */ > /* Skip verify of memtag_to_string, invalid_p == 0 */ > /* Skip verify of tagged_address_p, invalid_p == 0 */ > /* Skip verify of memtag_matches_p, invalid_p == 0 */ > @@ -974,8 +975,8 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file) > "gdbarch_dump: addr_bits_remove = <%s>\n", > host_address_to_string (gdbarch->addr_bits_remove)); > gdb_printf (file, > - "gdbarch_dump: significant_addr_bit = %s\n", > - plongest (gdbarch->significant_addr_bit)); > + "gdbarch_dump: remove_non_address_bits = <%s>\n", > + host_address_to_string (gdbarch->remove_non_address_bits)); > gdb_printf (file, > "gdbarch_dump: memtag_to_string = <%s>\n", > host_address_to_string (gdbarch->memtag_to_string)); > @@ -3147,21 +3148,21 @@ set_gdbarch_addr_bits_remove (struct gdbarch *gdbarch, > gdbarch->addr_bits_remove = addr_bits_remove; > } > > -int > -gdbarch_significant_addr_bit (struct gdbarch *gdbarch) > +CORE_ADDR > +gdbarch_remove_non_address_bits (struct gdbarch *gdbarch, CORE_ADDR pointer) > { > gdb_assert (gdbarch != NULL); > - /* Skip verify of significant_addr_bit, invalid_p == 0 */ > + gdb_assert (gdbarch->remove_non_address_bits != NULL); > if (gdbarch_debug >= 2) > - gdb_printf (gdb_stdlog, "gdbarch_significant_addr_bit called\n"); > - return gdbarch->significant_addr_bit; > + gdb_printf (gdb_stdlog, "gdbarch_remove_non_address_bits called\n"); > + return gdbarch->remove_non_address_bits (gdbarch, pointer); > } > > void > -set_gdbarch_significant_addr_bit (struct gdbarch *gdbarch, > - int significant_addr_bit) > +set_gdbarch_remove_non_address_bits (struct gdbarch *gdbarch, > + gdbarch_remove_non_address_bits_ftype remove_non_address_bits) > { > - gdbarch->significant_addr_bit = significant_addr_bit; > + gdbarch->remove_non_address_bits = remove_non_address_bits; > } > > std::string > diff --git a/gdb/target.c b/gdb/target.c > index 18e53aa5d27..4ce1b9451a0 100644 > --- a/gdb/target.c > +++ b/gdb/target.c > @@ -1644,7 +1644,7 @@ memory_xfer_partial (struct target_ops *ops, enum target_object object, > if (len == 0) > return TARGET_XFER_EOF; > > - memaddr = address_significant (target_gdbarch (), memaddr); > + memaddr = gdbarch_remove_non_address_bits (target_gdbarch (), memaddr); > > /* Fill in READBUF with breakpoint shadows, or WRITEBUF with > breakpoint insns, thus hiding out from higher layers whether > diff --git a/gdb/testsuite/gdb.arch/aarch64-non-address-bits.c b/gdb/testsuite/gdb.arch/aarch64-non-address-bits.c > new file mode 100644 > index 00000000000..3cf6d63da17 > --- /dev/null > +++ b/gdb/testsuite/gdb.arch/aarch64-non-address-bits.c > @@ -0,0 +1,25 @@ > +/* This file is part of GDB, the GNU debugger. > + > + Copyright 2022 Free Software Foundation, Inc. > + > + This program is free software; you can redistribute it and/or modify > + it under the terms of the GNU General Public License as published by > + the Free Software Foundation; either version 3 of the License, or > + (at your option) any later version. > + > + This program is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + GNU General Public License for more details. > + > + You should have received a copy of the GNU General Public License > + along with this program. If not, see . */ > + > +static long l = 0; > +static long *l_ptr = &l; > + > +int > +main (int argc, char **argv) > +{ > + return *l_ptr; > +} > diff --git a/gdb/testsuite/gdb.arch/aarch64-non-address-bits.exp b/gdb/testsuite/gdb.arch/aarch64-non-address-bits.exp > new file mode 100644 > index 00000000000..2b5a7b2f517 > --- /dev/null > +++ b/gdb/testsuite/gdb.arch/aarch64-non-address-bits.exp > @@ -0,0 +1,121 @@ > +# Copyright 2022 Free Software Foundation, Inc. > +# > +# This program is free software; you can redistribute it and/or modify > +# it under the terms of the GNU General Public License as published by > +# the Free Software Foundation; either version 3 of the License, or > +# (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program. If not, see . > +# > +# This file is part of the gdb testsuite. > +# > +# Test that GDB for AArch64/Linux can properly handle pointers with > +# the upper 16 bits (PAC) or 8 bits (Tag) set, as well as the > +# VA_RANGE_SELECT bit (55). > + > +if {![is_aarch64_target]} { > + verbose "Skipping ${gdb_test_file_name}." > + return > +} > + > +global hex > +global decimal > + > +standard_testfile > +if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile}] } { > + return -1 > +} > + > +if ![runto_main] { > + return -1 > +} > + > +# We need to iterate over two distinct ranges, separated by a single bit. > +# This bit is 55 (VA_RANGE_SELECT) which tells us if we have a kernel-space > +# address or a user-space address. > + > +# The tag field has 8 bits. > +set tag_bits_count 8 > + > +# The pac field has 7 bits. > +set pac_bits_count 7 > + > +# A couple patterns that we reuse for the tests later. One is for a successful > +# memory read and the other is for a memory read failure. > +set memory_read_ok_pattern "$hex\( \)?:\[ \t\]+$hex" > +set memory_read_fail_pattern "$hex:\[ \t\]+Cannot access memory at address $hex" > + > +set pac_enabled 0 > + > +# Check if PAC is enabled. > +gdb_test_multiple "ptype \$pauth_cmask" "fetch PAC cmask" { > + -re "type = long\r\n$gdb_prompt" { > + set pac_enabled 1 > + } > + -re "type = void\r\n$gdb_prompt" { > + } > + -re ".*$gdb_prompt $" { > + fail $gdb_test_name > + return 1 > + } > +} > + > +# Value of the cmask register. > +set cmask 0 > + > +# If there are PAC registers, GDB uses those to unmask the PAC bits. > +if {$pac_enabled} { > + set cmask [get_valueof "" "\$pauth_cmask >> 48" "0" "fetch PAC cmask"] > +} > + > +# Cycle through the tag and pac bit ranges and check how GDB > +# behaves when trying to access these addresses. > +foreach upper_bits {"0x0" "0x1" "0x2" "0x4" "0x8" "0x10" "0x20" "0x40" "0x80"} { > + foreach lower_bits {"0x0" "0x1" "0x2" "0x4" "0x8" "0x10" "0x20" "0x40"} { > + > + # A successful memory read pattern > + set pattern $memory_read_ok_pattern > + > + if {!$pac_enabled} { > + # If PAC is not supported, memory reads will fail if > + # lower_bits != 0x0 > + if {$lower_bits != "0x0"} { > + set pattern $memory_read_fail_pattern > + } > + } else { > + # Otherwise, figure out if the memory read will succeed or not by > + # checking cmask. > + gdb_test_multiple "p/x (~${cmask}ULL & (${lower_bits}ULL))" "" { > + -re "= 0x0\r\n$gdb_prompt" { > + # Either cmask is 0x7F or lower_bits is 0x0. Either way, the > + # memory read should succeed. > + } > + -re "= $hex\r\n$gdb_prompt" { > + if {$lower_bits != "0x0"} { > + # cmask doesn't mask off all the PAC bits, which > + # results in a memory read failure, with the actual > + # address being accessed differing from the one we > + # passed. > + set pattern $memory_read_fail_pattern > + } > + } > + } > + } > + > + # Test without the VA_RANGE_SELECT bit set. > + gdb_test "x/gx ((unsigned long) l_ptr | ((${upper_bits}ULL << 56) | (${lower_bits}ULL << 48)))" \ > + $pattern \ > + "user-space memory access tag bits $upper_bits and pac bits $lower_bits" > + > + # Now test with the VA_RANGE_SELECT bit set. > + gdb_test "x/gx ((unsigned long) l_ptr | ((${upper_bits}ULL << 56) | (${lower_bits}ULL << 48) | (1ULL << 55))) " \ > + $memory_read_fail_pattern \ > + "kernel-space memory access tag bits $upper_bits and pac bits $lower_bits" > + } > +} > diff --git a/gdb/utils.c b/gdb/utils.c > index 413a4f4d53b..f88d669c016 100644 > --- a/gdb/utils.c > +++ b/gdb/utils.c > @@ -3139,28 +3139,6 @@ show_debug_timestamp (struct ui_file *file, int from_tty, > } > > > -/* See utils.h. */ > - > -CORE_ADDR > -address_significant (gdbarch *gdbarch, CORE_ADDR addr) > -{ > - /* Clear insignificant bits of a target address and sign extend resulting > - address, avoiding shifts larger or equal than the width of a CORE_ADDR. > - The local variable ADDR_BIT stops the compiler reporting a shift overflow > - when it won't occur. Skip updating of target address if current target > - has not set gdbarch significant_addr_bit. */ > - int addr_bit = gdbarch_significant_addr_bit (gdbarch); > - > - if (addr_bit && (addr_bit < (sizeof (CORE_ADDR) * HOST_CHAR_BIT))) > - { > - CORE_ADDR sign = (CORE_ADDR) 1 << (addr_bit - 1); > - addr &= ((CORE_ADDR) 1 << addr_bit) - 1; > - addr = (addr ^ sign) - sign; > - } > - > - return addr; > -} > - > const char * > paddress (struct gdbarch *gdbarch, CORE_ADDR addr) > { > diff --git a/gdb/utils.h b/gdb/utils.h > index d2acf899ba2..237ef0a5d99 100644 > --- a/gdb/utils.h > +++ b/gdb/utils.h > @@ -278,9 +278,6 @@ extern void fputs_styled (const char *linebuffer, > extern void fputs_highlighted (const char *str, const compiled_regex &highlight, > struct ui_file *stream); > > -/* Return the address only having significant bits. */ > -extern CORE_ADDR address_significant (gdbarch *gdbarch, CORE_ADDR addr); > - > /* Convert CORE_ADDR to string in platform-specific manner. > This is usually formatted similar to 0x%lx. */ > extern const char *paddress (struct gdbarch *gdbarch, CORE_ADDR addr); > diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc > index db508696261..8a6077b6c76 100644 > --- a/gdbserver/linux-aarch64-low.cc > +++ b/gdbserver/linux-aarch64-low.cc > @@ -508,21 +508,37 @@ aarch64_target::low_remove_point (raw_bkpt_type type, CORE_ADDR addr, > return ret; > } > > -/* Return the address only having significant bits. This is used to ignore > - the top byte (TBI). */ > - > static CORE_ADDR > -address_significant (CORE_ADDR addr) > +aarch64_remove_non_address_bits (CORE_ADDR pointer) > { > - /* Clear insignificant bits of a target address and sign extend resulting > - address. */ > - int addr_bit = 56; > + /* By default, we assume TBI and discard the top 8 bits plus the > + VA range select bit (55). */ > + CORE_ADDR mask = (((CORE_ADDR) 1) << (64 - 9)) - 1; > + mask = ~mask; > + > + /* Check if PAC is available for this target. */ > + if (tdesc_contains_feature (current_process ()->tdesc, > + "org.gnu.gdb.aarch64.pauth")) > + { > + /* Fetch the PAC masks. These masks are per-process, so we can just > + fetch data from whatever thread we have at the moment. > + > + Also, we have both a code mask and a data mask. For now they are the > + same, but this may change in the future. */ > > - CORE_ADDR sign = (CORE_ADDR) 1 << (addr_bit - 1); > - addr &= ((CORE_ADDR) 1 << addr_bit) - 1; > - addr = (addr ^ sign) - sign; > + struct regcache *regs = get_thread_regcache (current_thread, 1); > + CORE_ADDR dmask = regcache_raw_get_unsigned_by_name (regs, "pauth_dmask"); > + CORE_ADDR cmask = regcache_raw_get_unsigned_by_name (regs, "pauth_cmask"); > + > + if (dmask != cmask && dmask != 0 && cmask != 0) > + { > + /* Warn if the masks are different. */ > + warning (_("C mask and D mask differ")); > + mask |= (dmask > cmask)? dmask : cmask; > + } > + } > > - return addr; > + return aarch64_remove_top_bits (pointer, mask); > } > > /* Implementation of linux target ops method "low_stopped_data_address". */ > @@ -549,7 +565,7 @@ aarch64_target::low_stopped_data_address () > hardware watchpoint hit. The stopped data addresses coming from the > kernel can potentially be tagged addresses. */ > const CORE_ADDR addr_trap > - = address_significant ((CORE_ADDR) siginfo.si_addr); > + = aarch64_remove_non_address_bits ((CORE_ADDR) siginfo.si_addr); > > /* Check if the address matches any watched address. */ > state = aarch64_get_debug_reg_state (pid_of (current_thread));