From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 92536 invoked by alias); 31 May 2018 16:18:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 92526 invoked by uid 89); 31 May 2018 16:18:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=ulongest, ULONGEST X-HELO: mx1.redhat.com Received: from mx3-rdu2.redhat.com (HELO mx1.redhat.com) (66.187.233.73) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 31 May 2018 16:18:25 +0000 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 72912401EF10; Thu, 31 May 2018 16:18:24 +0000 (UTC) Received: from [127.0.0.1] (ovpn04.gateway.prod.ext.ams2.redhat.com [10.39.146.4]) by smtp.corp.redhat.com (Postfix) with ESMTP id CCEDA1134CA6; Thu, 31 May 2018 16:18:23 +0000 (UTC) Subject: Re: [PATCH 4/8] Enable SVE for GDB To: Alan Hayward References: <20180511105256.27388-1-alan.hayward@arm.com> <20180511105256.27388-5-alan.hayward@arm.com> <8455164b-72c9-61d5-17c0-c77304d588ce@redhat.com> Cc: "gdb-patches@sourceware.org" , nd From: Pedro Alves Message-ID: <2c87cd8d-c608-4ccf-b16a-635168dbb250@redhat.com> Date: Thu, 31 May 2018 16:27:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-SW-Source: 2018-05/txt/msg00862.txt.bz2 On 05/31/2018 05:13 PM, Alan Hayward wrote: > > >> On 31 May 2018, at 15:59, Pedro Alves wrote: >> >> On 05/11/2018 11:52 AM, Alan Hayward wrote: >>> --- a/gdb/aarch64-tdep.c >>> +++ b/gdb/aarch64-tdep.c >>> @@ -2873,6 +2873,26 @@ aarch64_read_description (long vq) >>> return tdesc; >>> } >>> >>> +/* Return the VQ used when creating the target description TDESC. */ >>> + >>> +static long >>> +aarch64_get_tdesc_vq (const struct target_desc *tdesc) >> >> Is this use of "long" significant? I mean, is it assuming 64-bit? >> I ask because longs are not 64-bit on x64 Windows, so it would >> do the wrong thing when cross debugging. > > In the kernel structure it’s a 16bit value. > > However, the VG "register" in the regcache is a 64bit value. (It’s not > a real system register, but helps a great deal to see it as one in gdb, > and we need it as a dwarf register.) I made it 64bits to match the > minimum size of all the other aarch64 registers. OK, fine to make it 64-bit, but then the "do the wrong thing when cross debugging" point applies. "long" is 32-bit on some hosts. I don't really know what values VG can take -- can they be negative? I.e., is sign extension expected? You did not seem to address this in your reply. Why not use host-independent ULONGEST, for example? > I did have it as 16bits at one point, but it went wrong when using it > with dwarf as it expects all the dwarf registers to be the minimum > register. > > I chose to do the conversion from 16bits to 64bits at the point vg is > read from the kernel. This makes the code easy as from then on as it’s > always 64bits throughout. > > Alternatively, I could have kept as 16bits up to the point it hits > the regcache. But that leaves two different types around the code. Thanks, Pedro Alves