[PATCH 1/3] AArch64: Tidy up aarch64_gdbarch_init

[PATCH 1/3] AArch64: Tidy up aarch64_gdbarch_init

[Alan Hayward]

Move the lookup_by_info to the top of the function to avoid unnecessarily
creating a new feature when the gdbarch already exists.

Add some additional cleanups that have no functional effect.

gdb/ChangeLog:

2019-03-22  Alan Hayward  <alan.hayward@arm.com>

	* aarch64-tdep.c (aarch64_gdbarch_init): Move gdbarch lookup.
---
 gdb/aarch64-tdep.c | 68 ++++++++++++++++++----------------------------
 1 file changed, 26 insertions(+), 42 deletions(-)

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 247d0ed4c6..3eb22a8502 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -3149,36 +3149,37 @@ aarch64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
 static struct gdbarch *
 aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 {
-  struct gdbarch_tdep *tdep;
-  struct gdbarch *gdbarch;
-  struct gdbarch_list *best_arch;
-  struct tdesc_arch_data *tdesc_data = NULL;
-  const struct target_desc *tdesc = info.target_desc;
-  int i;
-  int valid_p = 1;
-  const struct tdesc_feature *feature_core;
-  const struct tdesc_feature *feature_fpu;
-  const struct tdesc_feature *feature_sve;
+  const struct tdesc_feature *feature_core, *feature_fpu, *feature_sve;
   const struct tdesc_feature *feature_pauth;
-  int num_regs = 0;
-  int num_pseudo_regs = 0;
-  int first_pauth_regnum = -1;
-  int pauth_ra_state_offset = -1;
+  bool valid_p = true;
+  int i, num_regs = 0, num_pseudo_regs = 0;
+  int first_pauth_regnum = -1, pauth_ra_state_offset = -1;
+
+  /* If there is already a candidate, use it.  */
+  for (gdbarch_list *best_arch = gdbarch_list_lookup_by_info (arches, &info);
+       best_arch != nullptr;
+       best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
+    {
+      struct gdbarch_tdep *tdep = gdbarch_tdep (best_arch->gdbarch);
+      if (tdep)
+	return best_arch->gdbarch;
+    }
 
   /* Ensure we always have a target description.  */
+  const struct target_desc *tdesc = info.target_desc;
   if (!tdesc_has_registers (tdesc))
     tdesc = aarch64_read_description (0, false);
   gdb_assert (tdesc);
 
-  feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.core");
+  feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core");
   feature_fpu = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.fpu");
   feature_sve = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sve");
   feature_pauth = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.pauth");
 
-  if (feature_core == NULL)
-    return NULL;
+  if (feature_core == nullptr)
+    return nullptr;
 
-  tdesc_data = tdesc_data_alloc ();
+  struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
 
   /* Validate the description provides the mandatory core R registers
      and allocate their numbers.  */
@@ -3190,9 +3191,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   num_regs = AARCH64_X0_REGNUM + i;
 
   /* Add the V registers.  */
-  if (feature_fpu != NULL)
+  if (feature_fpu != nullptr)
     {
-      if (feature_sve != NULL)
+      if (feature_sve != nullptr)
 	error (_("Program contains both fpu and SVE features."));
 
       /* Validate the description provides the mandatory V registers
@@ -3206,7 +3207,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     }
 
   /* Add the SVE registers.  */
-  if (feature_sve != NULL)
+  if (feature_sve != nullptr)
     {
       /* Validate the description provides the mandatory SVE registers
 	 and allocate their numbers.  */
@@ -3219,7 +3220,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       num_pseudo_regs += 32;	/* add the Vn register pseudos.  */
     }
 
-  if (feature_fpu != NULL || feature_sve != NULL)
+  if (feature_fpu != nullptr || feature_sve != nullptr)
     {
       num_pseudo_regs += 32;	/* add the Qn scalar register pseudos */
       num_pseudo_regs += 32;	/* add the Dn scalar register pseudos */
@@ -3247,30 +3248,14 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   if (!valid_p)
     {
       tdesc_data_cleanup (tdesc_data);
-      return NULL;
+      return nullptr;
     }
 
   /* AArch64 code is always little-endian.  */
   info.byte_order_for_code = BFD_ENDIAN_LITTLE;
 
-  /* If there is already a candidate, use it.  */
-  for (best_arch = gdbarch_list_lookup_by_info (arches, &info);
-       best_arch != NULL;
-       best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
-    {
-      /* Found a match.  */
-      break;
-    }
-
-  if (best_arch != NULL)
-    {
-      if (tdesc_data != NULL)
-	tdesc_data_cleanup (tdesc_data);
-      return best_arch->gdbarch;
-    }
-
-  tdep = XCNEW (struct gdbarch_tdep);
-  gdbarch = gdbarch_alloc (&info, tdep);
+  struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
+  struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
 
   /* This should be low enough for everything.  */
   tdep->lowest_pc = 0x20;
@@ -3281,7 +3266,6 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->pauth_ra_state_regnum = (feature_pauth == NULL) ? -1
 				: pauth_ra_state_offset + num_regs;
 
-
   set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call);
   set_gdbarch_frame_align (gdbarch, aarch64_frame_align);
 
-- 
2.17.2 (Apple Git-113)

[PATCH 0/3] AArch64 SVE: Support for changing vector length

[Alan Hayward]

On an AArch64 SVE system it is possible to change the vector length of the
current thread (not process!) using prctl.  Currently GDB will ignore any
such changes on a process being debugged.

This patch series supports these changes by using an override of
thread_architecture ().  An example is given in patch 2.

Note that this does not yet work when debugging a process attached via
gdbserver. Here GDB will continue to ignore the change.  Getting this
working is a more larger change which I'm still looking into.

Tested on a system emulator running Linux.

Once real world hardware SVE running Linux is available I'd like to add
some tests for this.  until there is not much point as running the
testsuite on a fully emulated system is fairly painful.


Alan Hayward (3):
  AArch64: Tidy up aarch64_gdbarch_init
  AArch64 SVE: Check for vector length change when getting gdbarch
  AArch64 SVE: Support changing vector lengths for ptrace

 gdb/aarch64-linux-nat.c            | 36 ++++++++++++
 gdb/aarch64-tdep.c                 | 92 +++++++++++++++---------------
 gdb/nat/aarch64-sve-linux-ptrace.c | 92 ++++++++++++++++--------------
 gdb/nat/aarch64-sve-linux-ptrace.h | 12 +++-
 4 files changed, 140 insertions(+), 92 deletions(-)

-- 
2.17.2 (Apple Git-113)

[PATCH 3/3] AArch64 SVE: Support changing vector lengths for ptrace

[Alan Hayward]

When writing registers to the kernel, check if regcache VG has been changed. If
so then update the thread's vector length, then write back the registers.

When reading registers from the kernel, ensure regcache VG register is updated.
The regcache registers should already be of the correct length.

Remove all the checks that error if the vector length has changed.

2019-03-22  Alan Hayward  <alan.hayward@arm.com>

gdb/
	* aarch64-linux-nat.c (store_sveregs_to_thread): Set vector length.
	* nat/aarch64-sve-linux-ptrace.c (aarch64_sve_set_vq): New function.
	(aarch64_sve_regs_copy_to_reg_buf): Remove VG checks.
	(aarch64_sve_regs_copy_from_reg_buf): Likewise.
	* nat/aarch64-sve-linux-ptrace.h (aarch64_sve_set_vq): New declaration.
---
 gdb/aarch64-linux-nat.c            |  5 ++
 gdb/nat/aarch64-sve-linux-ptrace.c | 92 ++++++++++++++++--------------
 gdb/nat/aarch64-sve-linux-ptrace.h | 12 +++-
 3 files changed, 63 insertions(+), 46 deletions(-)

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index 1fe3b83aac..79dcf0d696 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -411,6 +411,11 @@ store_sveregs_to_thread (struct regcache *regcache)
   struct iovec iovec;
   int tid = regcache->ptid ().lwp ();
 
+  /* First store vector length to the thread.  This is done first to ensure the
+     ptrace buffers read from the kernel are the correct size.  */
+  if (!aarch64_sve_set_vq (tid, regcache))
+    perror_with_name (_("Unable to set VG register."));
+
   /* Obtain a dump of SVE registers from ptrace.  */
   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 
diff --git a/gdb/nat/aarch64-sve-linux-ptrace.c b/gdb/nat/aarch64-sve-linux-ptrace.c
index 30faab22bb..635b4c9d68 100644
--- a/gdb/nat/aarch64-sve-linux-ptrace.c
+++ b/gdb/nat/aarch64-sve-linux-ptrace.c
@@ -27,8 +27,6 @@
 #include "common/common-regcache.h"
 #include "common/byte-vector.h"
 
-static bool vq_change_warned = false;
-
 /* See nat/aarch64-sve-linux-ptrace.h.  */
 
 uint64_t
@@ -63,6 +61,48 @@ aarch64_sve_get_vq (int tid)
 
 /* See nat/aarch64-sve-linux-ptrace.h.  */
 
+bool
+aarch64_sve_set_vq (int tid, uint64_t vq)
+{
+  struct iovec iovec;
+  struct user_sve_header header;
+
+  iovec.iov_len = sizeof (header);
+  iovec.iov_base = &header;
+
+  if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_SVE, &iovec) < 0)
+    {
+      /* SVE is not supported.  */
+      return false;
+    }
+
+  header.vl = sve_vl_from_vq (vq);
+
+  if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec) < 0)
+    {
+      /* Vector length change failed.  */
+      return false;
+    }
+
+  return true;
+}
+
+/* See nat/aarch64-sve-linux-ptrace.h.  */
+
+bool
+aarch64_sve_set_vq (int tid, struct reg_buffer_common *reg_buf)
+{
+  if (reg_buf->get_register_status (AARCH64_SVE_VG_REGNUM) != REG_VALID)
+    return false;
+
+  uint64_t reg_vg = 0;
+  reg_buf->raw_collect (AARCH64_SVE_VG_REGNUM, &reg_vg);
+
+  return aarch64_sve_set_vq (tid, sve_vq_from_vg (reg_vg));
+}
+
+/* See nat/aarch64-sve-linux-ptrace.h.  */
+
 std::unique_ptr<gdb_byte[]>
 aarch64_sve_get_sveregs (int tid)
 {
@@ -95,37 +135,18 @@ aarch64_sve_regs_copy_to_reg_buf (struct reg_buffer_common *reg_buf,
 {
   char *base = (char *) buf;
   struct user_sve_header *header = (struct user_sve_header *) buf;
-  uint64_t vq, vg_reg_buf = 0;
 
-  vq = sve_vq_from_vl (header->vl);
+  uint64_t vq = sve_vq_from_vl (header->vl);
+  uint64_t vg = sve_vg_from_vl (header->vl);
 
   /* Sanity check the data in the header.  */
   if (!sve_vl_valid (header->vl)
       || SVE_PT_SIZE (vq, header->flags) != header->size)
     error (_("Invalid SVE header from kernel."));
 
-  if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_VG_REGNUM))
-    reg_buf->raw_collect (AARCH64_SVE_VG_REGNUM, &vg_reg_buf);
-
-  if (vg_reg_buf == 0)
-    {
-      /* VG has not been set.  */
-      vg_reg_buf = sve_vg_from_vl (header->vl);
-      reg_buf->raw_supply (AARCH64_SVE_VG_REGNUM, &vg_reg_buf);
-    }
-  else if (vg_reg_buf != sve_vg_from_vl (header->vl) && !vq_change_warned)
-    {
-      /* Vector length on the running process has changed.  GDB currently does
-	 not support this and will result in GDB showing incorrect partially
-	 incorrect data for the vector registers.  Warn once and continue.  We
-	 do not expect many programs to exhibit this behaviour.  To fix this
-	 we need to spot the change earlier and generate a new target
-	 descriptor.  */
-      warning (_("SVE Vector length has changed (%ld to %d). "
-		 "Vector registers may show incorrect data."),
-	       vg_reg_buf, sve_vg_from_vl (header->vl));
-      vq_change_warned = true;
-    }
+  /* Update VG.  Note, the registers in the regcache will already be of the
+     correct length.  */
+  reg_buf->raw_supply (AARCH64_SVE_VG_REGNUM, &vg);
 
   if (HAS_SVE_STATE (*header))
     {
@@ -187,30 +208,13 @@ aarch64_sve_regs_copy_from_reg_buf (const struct reg_buffer_common *reg_buf,
 {
   struct user_sve_header *header = (struct user_sve_header *) buf;
   char *base = (char *) buf;
-  uint64_t vq, vg_reg_buf = 0;
-
-  vq = sve_vq_from_vl (header->vl);
+  uint64_t vq = sve_vq_from_vl (header->vl);
 
   /* Sanity check the data in the header.  */
   if (!sve_vl_valid (header->vl)
       || SVE_PT_SIZE (vq, header->flags) != header->size)
     error (_("Invalid SVE header from kernel."));
 
-  if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_VG_REGNUM))
-    reg_buf->raw_collect (AARCH64_SVE_VG_REGNUM, &vg_reg_buf);
-
-  if (vg_reg_buf != 0 && vg_reg_buf != sve_vg_from_vl (header->vl))
-    {
-      /* Vector length on the running process has changed.  GDB currently does
-	 not support this and will result in GDB writing invalid data back to
-	 the vector registers.  Error and exit.  We do not expect many programs
-	 to exhibit this behaviour.  To fix this we need to spot the change
-	 earlier and generate a new target descriptor.  */
-      error (_("SVE Vector length has changed (%ld to %d). "
-	       "Cannot write back registers."),
-	     vg_reg_buf, sve_vg_from_vl (header->vl));
-    }
-
   if (!HAS_SVE_STATE (*header))
     {
       /* There is no SVE state yet - the register dump contains a fpsimd
diff --git a/gdb/nat/aarch64-sve-linux-ptrace.h b/gdb/nat/aarch64-sve-linux-ptrace.h
index 167fc8ef3c..ee994f26c6 100644
--- a/gdb/nat/aarch64-sve-linux-ptrace.h
+++ b/gdb/nat/aarch64-sve-linux-ptrace.h
@@ -39,17 +39,25 @@
 
 uint64_t aarch64_sve_get_vq (int tid);
 
+/* Set VQ in the kernel for the given tid, using either the value VQ or
+   reading from the register VG in the register buffer.  */
+
+bool aarch64_sve_set_vq (int tid, uint64_t vq);
+bool aarch64_sve_set_vq (int tid, struct reg_buffer_common *reg_buf);
+
 /* Read the current SVE register set using ptrace, allocating space as
    required.  */
 
 extern std::unique_ptr<gdb_byte[]> aarch64_sve_get_sveregs (int tid);
 
-/* Put the registers from linux structure buf into register buffer.  */
+/* Put the registers from linux structure buf into register buffer.  Assumes the
+   vector lengths in the register buffer match the size in the kernel.  */
 
 extern void aarch64_sve_regs_copy_to_reg_buf (struct reg_buffer_common *reg_buf,
 					      const void *buf);
 
-/* Put the registers from register buffer into linux structure buf.  */
+/* Put the registers from register buffer into linux structure buf.  Assumes the
+   vector lengths in the register buffer match the size in the kernel.  */
 
 extern void
 aarch64_sve_regs_copy_from_reg_buf (const struct reg_buffer_common *reg_buf,
-- 
2.17.2 (Apple Git-113)

[PATCH 2/3] AArch64 SVE: Check for vector length change when getting gdbarch

[Alan Hayward]

Override the thread_architecture method, similar to SPU.  If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.

In the init routine, ensure the arch has the correct vector length.

Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length

(gdb) info threads
  Id   Target Id                                     Frame
  1    Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2    Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29	  int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30	  printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}

2019-03-22  Alan Hayward  <alan.hayward@arm.com>

gdb/
	* aarch64-linux-nat.c
	(aarch64_linux_nat_target::thread_architecture): Add override.
	* aarch64-tdep.c (aarch64_gdbarch_init): Ensure differemt tdesc for
	each VQ.
---
 gdb/aarch64-linux-nat.c | 31 +++++++++++++++++++++++++++++++
 gdb/aarch64-tdep.c      | 26 +++++++++++++++++++++-----
 2 files changed, 52 insertions(+), 5 deletions(-)

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index 86c7e87dd5..1fe3b83aac 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -45,6 +45,7 @@
 
 /* Defines ps_err_e, struct ps_prochandle.  */
 #include "gdb_proc_service.h"
+#include "arch-utils.h"
 
 #ifndef TRAP_HWBKPT
 #define TRAP_HWBKPT 0x0004
@@ -94,6 +95,8 @@ public:
   /* Add our siginfo layout converter.  */
   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
     override;
+
+  struct gdbarch *thread_architecture (ptid_t) override;
 };
 
 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
@@ -939,6 +942,34 @@ aarch64_linux_nat_target::can_do_single_step ()
   return 1;
 }
 
+/* Implement the "thread_architecture" target_ops method.  */
+
+struct gdbarch *
+aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
+{
+  /* Return the gdbarch for the current thread.  If the vector length has
+     changed since the last time this was called, then do a further lookup.  */
+
+  uint64_t vq = aarch64_sve_get_vq (ptid.lwp ());
+
+  /* Find the current gdbarch the same way as process_stratum_target.  Only
+     return it if the current vector length matches the one in the tdep.  */
+  inferior *inf = find_inferior_ptid (ptid);
+  gdb_assert (inf != NULL);
+  if (vq == gdbarch_tdep (inf->gdbarch)->vq)
+    return inf->gdbarch;
+
+  /* We reach here if the vector length for the thread is different from its
+     value at process start.  Lookup gdbarch via info (potentially creating a
+     new one), stashing the vector length inside id.  Use -1 for when SVE
+     unavailable, to distinguish from an unset value of 0.  */
+  struct gdbarch_info info;
+  gdbarch_info_init (&info);
+  info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
+  info.id = (int *) (vq == 0 ? -1 : vq);
+  return gdbarch_find_by_info (info);
+}
+
 /* Define AArch64 maintenance commands.  */
 
 static void
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 3eb22a8502..737b430d48 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -3155,20 +3155,36 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   int i, num_regs = 0, num_pseudo_regs = 0;
   int first_pauth_regnum = -1, pauth_ra_state_offset = -1;
 
+  /* Use the vector length passed via the target info.  Here -1 is used for no
+     SVE, and 0 is unset.  If unset then use the vector length from the existing
+     tdesc.  */
+  uint64_t vq = 0;
+  if (info.id == (int *) -1)
+    vq = 0;
+  else if (info.id != 0)
+    vq = (uint64_t) info.id;
+  else
+    vq = aarch64_get_tdesc_vq (info.target_desc);
+
+  if (vq > AARCH64_MAX_SVE_VQ)
+    internal_error (__FILE__, __LINE__, _("VQ out of bounds: %ld (max %d)"),
+		    vq, AARCH64_MAX_SVE_VQ);
+
   /* If there is already a candidate, use it.  */
   for (gdbarch_list *best_arch = gdbarch_list_lookup_by_info (arches, &info);
        best_arch != nullptr;
        best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
     {
       struct gdbarch_tdep *tdep = gdbarch_tdep (best_arch->gdbarch);
-      if (tdep)
+      if (tdep && tdep->vq == vq)
 	return best_arch->gdbarch;
     }
 
-  /* Ensure we always have a target description.  */
+  /* Ensure we always have a target descriptor, and that it is for the given VQ
+     value.  */
   const struct target_desc *tdesc = info.target_desc;
-  if (!tdesc_has_registers (tdesc))
-    tdesc = aarch64_read_description (0, false);
+  if (!tdesc_has_registers (tdesc) || vq != aarch64_get_tdesc_vq (tdesc))
+    tdesc = aarch64_read_description (vq, false);
   gdb_assert (tdesc);
 
   feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core");
@@ -3261,7 +3277,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->lowest_pc = 0x20;
   tdep->jb_pc = -1;		/* Longjump support not enabled by default.  */
   tdep->jb_elt_size = 8;
-  tdep->vq = aarch64_get_tdesc_vq (tdesc);
+  tdep->vq = vq;
   tdep->pauth_reg_base = first_pauth_regnum;
   tdep->pauth_ra_state_regnum = (feature_pauth == NULL) ? -1
 				: pauth_ra_state_offset + num_regs;
-- 
2.17.2 (Apple Git-113)

[PING][PATCH 0/3] AArch64 SVE: Support for changing vector length

[Alan Hayward]

Ping.

AArch64 only changes, so if there are no comments by the end of the week,
I’ll push on Monday.


Self review: Spelling mistake “differemt” in the ChangeLog for patch 2. :)


Alan.


> On 22 Mar 2019, at 16:27, Alan Hayward <Alan.Hayward@arm.com> wrote:
> 
> On an AArch64 SVE system it is possible to change the vector length of the
> current thread (not process!) using prctl.  Currently GDB will ignore any
> such changes on a process being debugged.
> 
> This patch series supports these changes by using an override of
> thread_architecture ().  An example is given in patch 2.
> 
> Note that this does not yet work when debugging a process attached via
> gdbserver. Here GDB will continue to ignore the change.  Getting this
> working is a more larger change which I'm still looking into.
> 
> Tested on a system emulator running Linux.
> 
> Once real world hardware SVE running Linux is available I'd like to add
> some tests for this.  until there is not much point as running the
> testsuite on a fully emulated system is fairly painful.
> 
> 
> Alan Hayward (3):
>  AArch64: Tidy up aarch64_gdbarch_init
>  AArch64 SVE: Check for vector length change when getting gdbarch
>  AArch64 SVE: Support changing vector lengths for ptrace
> 
> gdb/aarch64-linux-nat.c            | 36 ++++++++++++
> gdb/aarch64-tdep.c                 | 92 +++++++++++++++---------------
> gdb/nat/aarch64-sve-linux-ptrace.c | 92 ++++++++++++++++--------------
> gdb/nat/aarch64-sve-linux-ptrace.h | 12 +++-
> 4 files changed, 140 insertions(+), 92 deletions(-)
> 
> -- 
> 2.17.2 (Apple Git-113)
> 

Re: [PING][PATCH 0/3] AArch64 SVE: Support for changing vector length

[Alan Hayward]

...And pushed.


Alan.

> On 8 Apr 2019, at 16:46, Alan Hayward <Alan.Hayward@arm.com> wrote:
> 
> Ping.
> 
> AArch64 only changes, so if there are no comments by the end of the week,
> I’ll push on Monday.
> 
> 
> Self review: Spelling mistake “differemt” in the ChangeLog for patch 2. :)
> 
> 
> Alan.
> 
> 
>> On 22 Mar 2019, at 16:27, Alan Hayward <Alan.Hayward@arm.com> wrote:
>> 
>> On an AArch64 SVE system it is possible to change the vector length of the
>> current thread (not process!) using prctl.  Currently GDB will ignore any
>> such changes on a process being debugged.
>> 
>> This patch series supports these changes by using an override of
>> thread_architecture ().  An example is given in patch 2.
>> 
>> Note that this does not yet work when debugging a process attached via
>> gdbserver. Here GDB will continue to ignore the change.  Getting this
>> working is a more larger change which I'm still looking into.
>> 
>> Tested on a system emulator running Linux.
>> 
>> Once real world hardware SVE running Linux is available I'd like to add
>> some tests for this.  until there is not much point as running the
>> testsuite on a fully emulated system is fairly painful.
>> 
>> 
>> Alan Hayward (3):
>> AArch64: Tidy up aarch64_gdbarch_init
>> AArch64 SVE: Check for vector length change when getting gdbarch
>> AArch64 SVE: Support changing vector lengths for ptrace
>> 
>> gdb/aarch64-linux-nat.c            | 36 ++++++++++++
>> gdb/aarch64-tdep.c                 | 92 +++++++++++++++---------------
>> gdb/nat/aarch64-sve-linux-ptrace.c | 92 ++++++++++++++++--------------
>> gdb/nat/aarch64-sve-linux-ptrace.h | 12 +++-
>> 4 files changed, 140 insertions(+), 92 deletions(-)
>> 
>> -- 
>> 2.17.2 (Apple Git-113)
>> 
>