From: Alan Hayward <Alan.Hayward@arm.com>
To: Yao Qi <qiyaoltc@gmail.com>,
"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Cc: nd <nd@arm.com>
Subject: Re: [PATCH 10/11] Add XTENSA_MAX_REGISTER_SIZE
Date: Thu, 08 Jun 2017 09:42:00 -0000 [thread overview]
Message-ID: <3966B257-0F47-49C3-A1C1-F901D8E731AC@arm.com> (raw)
In-Reply-To: <49176F63-F5C5-43C2-A21D-A7642F4ACB80@arm.com>
> On 26 Apr 2017, at 10:59, Alan Hayward <Alan.Hayward@arm.com> wrote:
>
>
>> On 25 Apr 2017, at 16:39, Yao Qi <qiyaoltc@gmail.com> wrote:
>>
>> Alan Hayward <Alan.Hayward@arm.com> writes:
>>
I’ve rebased this patch due to Yao’s unit test changes.
XTENSA_MAX_REGISTER_SIZE is set to 64 to ensure nothing breaks.
I don't have a XTENSA machine to test on.
Tested on a --enable-targets=all and asan build using
make check with board files unix, native-gdbserver and unittest
Ok to commit?
Alan.
2017-06-08 Alan Hayward <alan.hayward@arm.com>
* xtensa-tdep.c (XTENSA_MAX_REGISTER_SIZE): Add.
(xtensa_register_write_masked): Use XTENSA_MAX_REGISTER_SIZE.
(xtensa_register_read_masked): Likewise.
diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index f9e858473a409ff082d30f9ff474d48da63903e3..f875f20d32b68abc37e3db37ab3e6053918536e5 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -120,6 +120,9 @@ static unsigned int xtensa_debug_level = 0;
#define PS_WOE (1<<18)
#define PS_EXC (1<<4)
+/* Big enough to hold the size of the largest register in bytes. */
+#define XTENSA_MAX_REGISTER_SIZE 64
+
static int
windowing_enabled (struct gdbarch *gdbarch, unsigned int ps)
{
@@ -370,7 +373,7 @@ static void
xtensa_register_write_masked (struct regcache *regcache,
xtensa_register_t *reg, const gdb_byte *buffer)
{
- unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+ unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
const xtensa_mask_t *mask = reg->mask;
int shift = 0; /* Shift for next mask (mod 32). */
@@ -454,7 +457,7 @@ static enum register_status
xtensa_register_read_masked (struct regcache *regcache,
xtensa_register_t *reg, gdb_byte *buffer)
{
- unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+ unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
const xtensa_mask_t *mask = reg->mask;
int shift = 0;
next prev parent reply other threads:[~2017-06-08 9:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-04 10:16 Alan Hayward
2017-04-05 10:23 ` Yao Qi
2017-04-06 12:49 ` Alan Hayward
2017-04-25 15:39 ` Yao Qi
2017-04-26 9:59 ` Alan Hayward
2017-06-08 9:42 ` Alan Hayward [this message]
2017-06-12 9:54 ` Yao Qi
2017-06-21 9:36 ` Alan Hayward
2017-06-22 16:40 ` Max Filippov
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