[PATCH,rs6000] Fix vsx-regs.exp testcase failure

[PATCH,rs6000] Fix vsx-regs.exp testcase failure

[will schmidt]

Hi,
  This test (gdb.arch/vsx-regs.exp) exercises updates to the
F0-F31 and VS0-VS31 registers and verifies updates to the same.
Note that the registers overlap; the doubleword[1] portion of
any VS0-VS31 register contains the F0-F31 register contents, so
any updates to one can be measured in the other.

Per a brief investigation, we see that dl_main() currently
uses some VSX instructions, so the VS* values are not
going to be zero when this testcase reaches main, where these
tests begin.  The test harness does not explicitly
initialize the full VS* values, so the first test loop
that updates the F* values means our VS* values are
partially uninitalized and will fail the first set of checks.
This update explicitly initializes the doubleword[0] portion
of the VS* registers, to allow this test to succeed.

YYYY-MM-DD  Will Schmidt  <will_schmidt@vnet.ibm.com>

gdb/testsuite/ChangeLog:
	* gdb.arch/vsx-regs.exp: Initilize vs* doublewords.


diff --git a/gdb/testsuite/gdb.arch/vsx-regs.exp b/gdb/testsuite/gdb.arch/vsx-regs.exp
index c234d6afd36..0b0d2fa4d53 100644
--- a/gdb/testsuite/gdb.arch/vsx-regs.exp
+++ b/gdb/testsuite/gdb.arch/vsx-regs.exp
@@ -87,11 +87,22 @@ if {$endianness == "big"} {
     set vector_register3_vr ".uint128 = 0x1000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
 }
 
 set float_register ".raw 0xdeadbeefdeadbeef."
 
-# First run the F0~F31/VS0~VS31 tests
+# Note that the F0-F31 registers are shared with the doubleword 0 portion of
+# the VS0-VS31 registers, the doubleword 1 portions of VS* remain unchanged
+# after updates to F*.
+# Since dl_main uses some VS* registers, and per inspection their values are
+# no longer zero when our test reaches main(), we need to explicitly
+# initialize the doubleword1 portions before we run our tests against
+# values currently in those registers.
+
+# 0: Initialize the (doubleword 1) portion of the VS0-VS31 registers.
+for {set i 0} {$i < 32} {incr i 1} {
+    gdb_test_no_output "set \$vs$i.v2_double\][0\] = 0"
+}
 
 # 1: Set F0~F31 registers and check if it reflects on VS0~VS31.
 for {set i 0} {$i < 32} {incr i 1} {
     gdb_test_no_output "set \$f$i = 1\.3"
 }

Re: [PATCH,rs6000] Fix vsx-regs.exp testcase failure

[Ulrich Weigand]

On Thu, Apr 01, 2021 at 03:39:26PM -0500, will schmidt wrote:
> 
> Hi,
>   This test (gdb.arch/vsx-regs.exp) exercises updates to the
> F0-F31 and VS0-VS31 registers and verifies updates to the same.
> Note that the registers overlap; the doubleword[1] portion of
> any VS0-VS31 register contains the F0-F31 register contents, so
> any updates to one can be measured in the other.
> 
> Per a brief investigation, we see that dl_main() currently
> uses some VSX instructions, so the VS* values are not
> going to be zero when this testcase reaches main, where these
> tests begin.  The test harness does not explicitly
> initialize the full VS* values, so the first test loop
> that updates the F* values means our VS* values are
> partially uninitalized and will fail the first set of checks.
> This update explicitly initializes the doubleword[0] portion
> of the VS* registers, to allow this test to succeed.
> 
> YYYY-MM-DD  Will Schmidt  <will_schmidt@vnet.ibm.com>
> 
> gdb/testsuite/ChangeLog:
> 	* gdb.arch/vsx-regs.exp: Initilize vs* doublewords.

Typo "Initialize".  Otherwise this is OK.

Thanks,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU/Linux compilers and toolchain
  Ulrich.Weigand@de.ibm.com