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From: John Baldwin <jhb@FreeBSD.org>
To: Luis Machado <luis.machado@linaro.org>,
	gdb-patches@sourceware.org, Alan.Hayward@arm.com
Cc: david.spickett@linaro.org, Omair Javaid <omair.javaid@linaro.org>
Subject: Re: [PATCH 00/23] Memory Tagging Support + AArch64 Linux implementation
Date: Thu, 23 Jul 2020 09:48:58 -0700	[thread overview]
Message-ID: <453663e2-8992-762d-045c-f6b731be2f0c@FreeBSD.org> (raw)
In-Reply-To: <80627efe-3aa2-fe0d-98e3-b7e7640d3904@linaro.org>

On 7/23/20 6:59 AM, Luis Machado wrote:
>> - One thing I do see is that this currently assumes only a single memory tag
>>    type for a given architecture, but there may be architectures in the future
>>    which have multiple types of tags.  For APIs we can always add that later
>>    if needed, but retroactively adding it to the remote protocol might prove
>>    more sticky.  One alternative might be to do something like
>>
>>    qMemTags:<type>:<address>:<length>
>>
>>    and similarly for QMemTags.
>>
>>    For MTE <type> could be "MTE" or "mte".  In the case that an architecture
>>    provides multiple tag types, then <type> could be used to disambiguate.
> 
> That sounds reasonable, but I'd still like to leave the interpretation 
> of the type field to the target-specific code. Remote stubs would just 
> parse the field and pass it on to the target-specific layers.

Agreed.

> Out of curiosity, what other types of tags do you think could be used in 
> the future?

The Morello prototype architecture includes "cheri" memory tags on aarch64,
and while Morello doesn't include MTE, it is within the realm of possibility
that a future aarch64 architecture will contain both MTE and CHERI and will
thus include two sets of memory tags.  One option would be for this to be
provided as a special "combined" tag since MTE and CHERI both have the same
tag stride (16 byte boundaries), but that might be more fragile to implement
compared to having them named separately.
 
>> - It might be better to not refer to tags specifically as "allocation tags"
>>    in the generic code like gdbarch.*.  I do think the 'mtag' commands are
>>    also still a bit MTE-specific, but that is probably fine for now.
> 
> I'm open to suggestions, but right now the two candidates we have are 
> ADI "versions" and MTE "tags".

I guess I view "tags" as a generic way of having a parallel address space
of memory (and in some cases registers) where metadata about the "normal"
memory or register contents are stored.  In that context "tag" is the
general name for metadata and MTE happens to use the general name directly.
I would perhaps just call them "tags" or "memory tags" in gdbarch, but that's
a minor quibble.

> We need a way to distinguish between the memory tags and the pointer 
> tags. "mtag", "atag" and "ltag" are documented in the manual so 
> developers can understand what their purpose is, even though those may 
> not match their particular architecture naming scheme.
> 
> GDB can also put together aliases for the commands, so targets can 
> define their own naming scheme for memory tagging commands.

That's fine.

-- 
John Baldwin

  reply	other threads:[~2020-07-23 16:49 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-15 19:44 Luis Machado
2020-07-15 19:44 ` [PATCH 01/23] New target methods for memory tagging support Luis Machado
2020-07-15 19:44 ` [PATCH 02/23] New gdbarch memory tagging hooks Luis Machado
2020-07-15 19:44 ` [PATCH 03/23] Add GDB-side remote target support for memory tagging Luis Machado
2020-07-15 19:44 ` [PATCH 04/23] Unit testing for GDB-side remote memory tagging handling Luis Machado
2020-07-15 19:44 ` [PATCH 05/23] GDBserver remote packet support for memory tagging Luis Machado
2020-07-15 19:44 ` [PATCH 06/23] Unit tests for gdbserver memory tagging remote packets Luis Machado
2020-07-15 19:44 ` [PATCH 07/23] Documentation for " Luis Machado
2020-07-17  5:54   ` Eli Zaretskii
2020-07-17 14:20     ` Luis Machado
2020-07-15 19:44 ` [PATCH 08/23] AArch64: Add MTE CPU feature check support Luis Machado
2020-07-15 19:44 ` [PATCH 09/23] AArch64: Add target description/feature for MTE registers Luis Machado
2020-07-15 19:45 ` [PATCH 10/23] AArch64: Add MTE register set support for GDB and gdbserver Luis Machado
2020-07-15 19:45 ` [PATCH 11/23] AArch64: Add MTE ptrace requests Luis Machado
2020-07-15 19:45 ` [PATCH 12/23] AArch64: Implement memory tagging target methods for AArch64 Luis Machado
2020-07-15 19:45 ` [PATCH 13/23] Refactor parsing of /proc/<pid>/smaps Luis Machado
2020-07-15 19:45 ` [PATCH 14/23] AArch64: Implement the memory tagging gdbarch hooks Luis Machado
2020-07-15 19:45 ` [PATCH 15/23] AArch64: Add unit testing for logical tag set/get operations Luis Machado
2020-07-15 19:45 ` [PATCH 16/23] AArch64: Report tag violation error information Luis Machado
2020-07-15 19:45 ` [PATCH 17/23] AArch64: Add gdbserver MTE support Luis Machado
2020-07-15 19:45 ` [PATCH 18/23] New mtag commands Luis Machado
2020-07-15 19:45 ` [PATCH 19/23] Documentation for the new " Luis Machado
2020-07-17  6:11   ` Eli Zaretskii
2020-07-17 14:20     ` Luis Machado
2020-07-17 14:29       ` Eli Zaretskii
2020-07-17 15:08         ` Luis Machado
2020-07-15 19:45 ` [PATCH 20/23] Extend "x" and "print" commands to support memory tagging Luis Machado
2020-07-15 19:45 ` [PATCH 21/23] Document new "x" and "print" memory tagging extensions Luis Machado
2020-07-17  6:16   ` Eli Zaretskii
2020-07-17 14:20     ` Luis Machado
2020-07-17 14:31       ` Eli Zaretskii
2020-07-15 19:45 ` [PATCH 22/23] Add NEWS entry Luis Machado
2020-07-17  6:18   ` Eli Zaretskii
2020-07-17 14:20     ` Luis Machado
2020-07-15 19:45 ` [PATCH 23/23] Add memory tagging testcases Luis Machado
2020-07-16 16:49 ` [PATCH 00/23] Memory Tagging Support + AArch64 Linux implementation Alan Hayward
2020-07-17 12:33   ` Luis Machado
2020-07-17 22:02 ` John Baldwin
2020-07-23 13:59   ` Luis Machado
2020-07-23 16:48     ` John Baldwin [this message]
2020-07-24 16:10       ` David Spickett
2020-07-23 14:59 ` Luis Machado

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