From: Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>,
Aditya Kamath1 <Aditya.Kamath1@ibm.com>
Cc: Sangamesh Mallayya <sangamesh.swamy@in.ibm.com>
Subject: Re: [PATCH] Enable-vector-register-visibility-in-core-file-for-AIX.patch
Date: Mon, 13 Mar 2023 13:06:42 +0000 [thread overview]
Message-ID: <4b0c380215810ae9fa052544c6c3b9ed3ccf01d6.camel@de.ibm.com> (raw)
In-Reply-To: <CH2PR15MB3544EA5B38D7AEDB27C8DCF4D6B99@CH2PR15MB3544.namprd15.prod.outlook.com>
Aditya Kamath1 <Aditya.Kamath1@ibm.com> wrote:
>Since we now support vector register contents debugging, we have added the below architecture. That is all the change.
>- bfd_mach_rs6k, &tdesc_rs6000},
>+ bfd_mach_rs6k, &tdesc_powerpc_vsx32},
Sorry, this is wrong - it will enable those sections unconditionally
across all platforms and operating systems.
Instead, you need to implement a function
rs6000_aix_core_read_description
that will determine the correct tdesc to use for any particular
core file depending on the sections that are actually present there.
You can see e.g. ppc_linux_core_read_description for
examples how to implement this routine.
Bye,
Ulrich
next prev parent reply other threads:[~2023-03-13 13:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-13 12:23 Aditya Kamath1
2023-03-13 13:06 ` Ulrich Weigand [this message]
2023-03-14 7:43 ` Aditya Kamath1
2023-03-14 17:58 ` Ulrich Weigand
2023-03-15 4:54 ` Aditya Kamath1
2023-03-15 18:32 ` Ulrich Weigand
2023-03-15 19:04 ` Simon Marchi
2023-03-16 12:50 ` Luis Machado
2023-03-16 13:51 ` Tom Tromey
2023-03-16 15:11 ` Ulrich Weigand
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