From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id 382203858D1E for ; Thu, 9 Nov 2023 19:04:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 382203858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=polymtl.ca Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=polymtl.ca ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 382203858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=132.207.4.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699556667; cv=none; b=JkriERFZ7HuWutEX/82SITBOXRlJRrcVH29Dqebzh/oKr1B8YL0KpVkLoI36G4bPI0CEhLcBBCvQ9y+YWEVZ3evYmUgZCtds2gX30l32v0kSb2B9KVzspac1VCLExBEF93arDX9AnRWr//3f9S821jDwjHxlL8h02DCvXLRNJGE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699556667; c=relaxed/simple; bh=PNL5AmJ8vn2x4ZMOI+XoyB/xOePZGpsPb5Y75NY94fk=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:From:To; b=oGmLj6D1lTv0MIDZG0a18DdUi45k00CN7oNsRfWhKg5ZSgNU9XQI8syMJzrOHvvH44pB02+DD/Ci0XQkf5iaXm73b9pi4WjL5hMvQo5Jao8MuU3CeVL4jN8joQviTH1gA1oV1VgNsv302Y0jmaHSSISKFSuePNuQCMKAJONcUKQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 3A9J47Tu007264 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 9 Nov 2023 14:04:11 -0500 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 3A9J47Tu007264 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=polymtl.ca; s=default; t=1699556652; bh=IRsuwlpFxuvNC0ZxCDKt1khpggOLI5rbuFKcs+ihU3Q=; h=Date:Subject:From:To:References:In-Reply-To:From; b=i5cDlo6ZNyjrHNeFID9QmLXYEmRg4xHAcEjkc121gRBvrnhklXp4lmCLuW1ASdeIH hDJgN3KLVVC7W+Jow80xaVV8H+DLB82k0nt+zhDzGhbOy2BudfFzV0MlUcZZ/WZ6/k 34LLBZFkHXERI+e6Bm5lPUHwQ3ZyFcYN2peXJ3Tc= Received: from [172.16.0.146] (192-222-143-198.qc.cable.ebox.net [192.222.143.198]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id CEA791E00F; Thu, 9 Nov 2023 14:04:06 -0500 (EST) Message-ID: <4bc57dc1-67ee-45b7-9de5-3cdc85b6518e@polymtl.ca> Date: Thu, 9 Nov 2023 14:04:05 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/24] Fix reading and writing pseudo registers in non-current frames Content-Language: fr From: Simon Marchi To: Luis Machado , gdb-patches@sourceware.org References: <20231108051222.1275306-1-simon.marchi@polymtl.ca> <9a693dcc-9213-4300-a4ee-25820bfada78@arm.com> <25f0e95c-32bb-41d1-acd0-69273ab7c88b@polymtl.ca> In-Reply-To: <25f0e95c-32bb-41d1-acd0-69273ab7c88b@polymtl.ca> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Thu, 9 Nov 2023 19:04:07 +0000 X-Spam-Status: No, score=-3037.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11/8/23 14:34, Simon Marchi wrote: > Ah, damn, probably because I switched to byte_vector, which doesn't do > the zero-initialization we want to do. Here's a new patch (that applies > on the series directly) that doesn't use byte_vector. > > diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c > index 1815d78dec4..200e740e013 100644 > --- a/gdb/aarch64-tdep.c > +++ b/gdb/aarch64-tdep.c > @@ -3300,7 +3300,7 @@ aarch64_pseudo_write_1 (gdbarch *gdbarch, frame_info_ptr next_frame, > int regnum_offset, > gdb::array_view buf) > { > - unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset; > + unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset; > gdb_static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM); > > /* Enough space for a full vector register. > @@ -3309,11 +3309,11 @@ aarch64_pseudo_write_1 (gdbarch *gdbarch, frame_info_ptr next_frame, > various 'scalar' pseudo registers to behavior like architectural > writes, register width bytes are written the remainder are set to > zero. */ > - constexpr int raw_reg_size = 16; > + int raw_reg_size = register_size (gdbarch, raw_regnum); > gdb_byte raw_buf[raw_reg_size] {}; > - gdb::array_view raw_view (raw_buf); > + gdb::array_view raw_view (raw_buf, raw_reg_size); > copy (buf, raw_view.slice (0, buf.size ())); > - put_frame_register (next_frame, v_regnum, raw_view); > + put_frame_register (next_frame, raw_regnum, raw_view); > } > > /* Given REGNUM, a SME pseudo-register number, store the bytes from DATA to the > > Simon I managed to run a Debian AArch64 image in qemu, with SVE support, so I was able to reproduce the failures you mentioned. In the end, here's a version of aarch64_pseudo_write_1 that works for me (written as to minimize the number of unnecessary changes, since that seems to introduce unexpected bugs...). static void aarch64_pseudo_write_1 (gdbarch *gdbarch, frame_info_ptr next_frame, int regnum_offset, gdb::array_view buf) { unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset; /* Enough space for a full vector register. */ int raw_reg_size = register_size (gdbarch, raw_regnum); gdb_byte raw_buf[raw_reg_size]; gdb_static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM); /* Ensure the register buffer is zero, we want gdb writes of the various 'scalar' pseudo registers to behavior like architectural writes, register width bytes are written the remainder are set to zero. */ memset (raw_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM)); gdb::array_view raw_view (raw_buf, raw_reg_size); copy (buf, raw_view.slice (0, buf.size ())); put_frame_register (next_frame, raw_regnum, raw_view); } Simon