From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id D4DC83854814 for ; Tue, 16 Mar 2021 22:31:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org D4DC83854814 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 12GM3eee072461 for ; Tue, 16 Mar 2021 18:31:09 -0400 Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0b-001b2d01.pphosted.com with ESMTP id 37b0kr83vy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 16 Mar 2021 18:31:09 -0400 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.0.43/8.16.0.43) with SMTP id 12GMM9NO015846 for ; Tue, 16 Mar 2021 22:31:08 GMT Received: from b03cxnp07029.gho.boulder.ibm.com (b03cxnp07029.gho.boulder.ibm.com [9.17.130.16]) by ppma02dal.us.ibm.com with ESMTP id 378n1a18dr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 16 Mar 2021 22:31:08 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 12GMV5ZP11272456 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 16 Mar 2021 22:31:05 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5B825BE05D; Tue, 16 Mar 2021 22:31:05 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 08E46BE051; Tue, 16 Mar 2021 22:31:04 +0000 (GMT) Received: from lexx (unknown [9.163.21.144]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Tue, 16 Mar 2021 22:31:04 +0000 (GMT) Message-ID: <4f6f081cb166e374d18e397781da854970e894ae.camel@vnet.ibm.com> Subject: [PATCH, rs6000][PR gdb/27525] displaced stepping across addpcis/lnia. From: will schmidt To: gdb-patches@sourceware.org Cc: Ulrich Weigand , rogerio Date: Tue, 16 Mar 2021 17:31:03 -0500 Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-10.el7) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-16_08:2021-03-16, 2021-03-16 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 mlxscore=0 bulkscore=0 mlxlogscore=999 adultscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103160140 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 22:31:13 -0000 [PATCH, rs6000][PR gdb/27525] displaced stepping across addpcis/lnia. Hi, This addresses PR gdb/27525. The lnia and other variations of the addpcis instruction write the value of the NIA into a target register. If we are single-stepping across a breakpoint, the instruction is executed from a displaced location, and thusly the written value of the PC/NIA will be incorrect. The changes here will measure the displacement offset, and adjust the target register value to compensate. This is written in a way that I believe will make it easier to update to handle prefixed (8 byte) instructions in a future patch. YYYY-MM-DD Will Schmidt gdb/ChangeLog: * gdb/rs6000-tdep.c (instruction_reads_PC_or_NIA): New function to identify if a particular instruction reads the current PC or the NIA register. (ppc_fund_instruction_target_register): New function that returns the target register for an instruction. (ppc_displaced_step_fixup): Update to handle instructions that use the PC/NIA, which require fixups. gdb/testsuite/ChangeLog: * gdb/testsuite/gdb.arch/powerpc-addpcis.exp: Testcase harness to exercise single-stepping over subpcis,lnia,addpcis instructions with displacement. * gdb/testsuite/gdb.arch/powerpc-addpcis.s: Testcase with stream of addpcis/lnia/subpcis instructions. * gdb/testsuite/gdb.arch/powerpc-lnia.exp: Testcase harness to exercise single-stepping over lnia instructions with displacement. * gdb/testsuite/gdb.arch/powerpc-lnia.s: Testcase with stream of lnia instructions. diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index b09f63137d..50cdd37b9a 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -918,10 +918,37 @@ ppc_displaced_step_copy_insn (struct gdbarch *gdbarch, return displaced_step_copy_insn_closure_up (closure.release ()); } /* Fix up the state of registers and memory after having single-stepped a displaced instruction. */ + +#define ADDPCIS_INSN 0x4c000004 +#define ADDPCIS_INSN_MASK 0xfc00003e +#define ADDPCIS_TARGET_REGISTER 0x03F00000 +#define ADDPCIS_INSN_REGSHIFT 21 + +static bool +instruction_reads_PC_or_NIA(ULONGEST insn) +{ + /* Handle addpcis instruction; lnia and subpcis mnemonics. */ + if ((insn & ADDPCIS_INSN_MASK) == ADDPCIS_INSN) { + return true; + } + return false; +} + +static int +ppc_find_instruction_target_register(ULONGEST insn) +{ + /* Handle addpcis instruction; lnia and subpcis mnemonics. */ + if ((insn & ADDPCIS_INSN_MASK) == ADDPCIS_INSN) { + return (insn & ADDPCIS_TARGET_REGISTER) >> ADDPCIS_INSN_REGSHIFT; + } + error (_("Did not determine target register for instruction")); +return 0; +} + static void ppc_displaced_step_fixup (struct gdbarch *gdbarch, struct displaced_step_copy_insn_closure *closure_, CORE_ADDR from, CORE_ADDR to, struct regcache *regs) @@ -939,12 +966,35 @@ ppc_displaced_step_fixup (struct gdbarch *gdbarch, opcode = insn & BRANCH_MASK; displaced_debug_printf ("(ppc) fixup (%s, %s)", paddress (gdbarch, from), paddress (gdbarch, to)); + /* Handle the instructions that reference the PC or NIA. */ + if (instruction_reads_PC_or_NIA(insn)) + { + LONGEST displaced_offset; + ULONGEST current_val; + /* Measure the displacement. */ + displaced_offset = from - to ; /* FIXME - By inspection, it appears the displaced instruction + is at a lower address. Is this always true? */ + displaced_debug_printf ("(ppc) PC/NIA instruction offset %lx",displaced_offset ); + /* Identify the target register that was updated by the instruction. */ + int regnum = ppc_find_instruction_target_register(insn); + displaced_debug_printf ("(ppc) addpcis fixup register:%d, instruction size:%ld",regnum,offset); + /* Read and update the target value. */ + regcache_cooked_read_unsigned (regs, regnum , ¤t_val); + displaced_debug_printf ("(ppc) insn fixup addpcis adjusted target regnum %d from 0x%lx to 0x%lx", + regnum, current_val, current_val + displaced_offset ); + regcache_cooked_write_unsigned (regs, regnum, current_val + displaced_offset); + + /* point the PC back at the non-displaced instruction. */ + displaced_debug_printf ("(ppc) addpcis fixup register:%d,insn_size:%ld",regnum,offset); + regcache_cooked_write_unsigned (regs, gdbarch_pc_regnum (gdbarch), + from + offset); + } /* Handle PC-relative branch instructions. */ - if (opcode == B_INSN || opcode == BC_INSN || opcode == BXL_INSN) + else if (opcode == B_INSN || opcode == BC_INSN || opcode == BXL_INSN) { ULONGEST current_pc; /* Read the current PC value after the instruction has been executed in a displaced location. Calculate the offset to be applied to the diff --git a/gdb/testsuite/gdb.arch/powerpc-addpcis.exp b/gdb/testsuite/gdb.arch/powerpc-addpcis.exp new file mode 100644 index 0000000000..4475ab70d9 --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-addpcis.exp @@ -0,0 +1,111 @@ +# Copyright 2021 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + + +# Test to confirm that gdb is properly single stepping over the +# displaced addpcis instruction. +# The addpcis instruction (and it's extended mnemonics lnia and subpcis +# apply an immediate shifted value (X || 0x0000) to the current PC/NIA +# value, and store that value into the instructions target register. +# When the instruction is displaced, it needs special handling. + +# lnia Rx == addpcis Rx,0 +# subcis Rx,value == addpcis Rx,-value + +if { ![istarget powerpc*-*] } { + verbose "Skipping powerpc addpcis test." + return +} + +set retval 0 + +set testfile "powerpc-addpcis" +set srcfile ${testfile}.s +set binfile [standard_output_file ${testfile}] + +if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {}] != "" } { + untested "PowerPC addpcis test" + return -1 +} + +gdb_exit +gdb_start +gdb_load ${binfile} + +if ![runto_main] then { + return +} + +set check_pc [get_hexadecimal_valueof "\$pc" "default0"] +set bp1 *$check_pc+4 +set bp2 *$check_pc+12 +set bp3 *$check_pc+16 +gdb_breakpoint $bp1 +gdb_breakpoint $bp2 +gdb_breakpoint $bp3 + +gdb_test "stepi" "" "set r3 " +set check_r3 [get_hexadecimal_valueof "\$r3" "default0"] +gdb_test "stepi" "" "set r4" +set check_r4 [get_hexadecimal_valueof "\$r4" "default0"] +gdb_test "stepi" "" "set r5" +set check_r5 [get_hexadecimal_valueof "\$r5" "default0"] +gdb_test "stepi" "" "set r6" +set check_r6 [get_hexadecimal_valueof "\$r6" "default0"] +gdb_test "stepi" "" "set r7" +set check_r7 [get_hexadecimal_valueof "\$r7" "default0"] +gdb_test "stepi" "" "set r8" +set check_r8 [get_hexadecimal_valueof "\$r8" "default0"] +gdb_test "stepi" "" "set r9" +set check_r9 [get_hexadecimal_valueof "\$r9" "default0"] + +# R6 will contain the reference value. All other +# instructions in this test will be storing values +# relative to what is stored in R6. + +# subpcis 3,+0x100 # /* set r3 */ +# subpcis 4,+0x10 # /* set r4 */ +# subpcis 5,+0x1 # /* set r5 */ +# lnia 6 # /* set r6 */ +# addpcis 7,+0x1 # /* set r7 */ +# addpcis 8,+0x10 # /* set r8 */ +# addpcis 9,+0x100 # /* set r9 */ + +if [expr $check_r3 + 0x1000000 != $check_r6 - 0xc ] { + fail "unexpected value r3 + 0x1,000,000 != r6 + 0xc ; r3: $check_r3 r6: $check_r6 " +} +if [expr $check_r4 + 0x100000 != $check_r6 - 0x8 ] { + fail "unexpected value r4 + 0x100,000 != r6 - 0x8 ; r4: $check_r4 r6: $check_r6 " +} +if [expr $check_r5 + 0x10000 != $check_r6 - 0x4 ] { + fail "unexpected value r5 + 0x10,000 != r6 , r5: $check_r5 r6: $check_r6 " +} +if [expr $check_r6 != $check_r6] { + fail "unexpected value r6 != r6 , r6: $check_r6 r6: $check_r6 " +} +if [expr $check_r7 - 0x10000 != $check_r6 + 0x4] { + fail "unexpected value r7 - 0x10,000 != r6 + 0x4 , r7: $check_r7 r7: $check_r6 " +} +if [expr $check_r8 - 0x100000 != $check_r6 + 0x8 ] { + fail "unexpected value r8 - 0x100,000 != r6 , r8: $check_r8 r8: $check_r6 " +} +if [expr $check_r9 - 0x1000000 != $check_r6 + 0xc ] { + fail "unexpected value r9 - 0x1,000,000 != r6 + 0xc , r9: $check_r9 r6: $check_r6 " +} + +gdb_test "info break" +gdb_test "info register r3 r4 r5 r6 r7 r8 r9" +gdb_test "disas main" + diff --git a/gdb/testsuite/gdb.arch/powerpc-addpcis.s b/gdb/testsuite/gdb.arch/powerpc-addpcis.s new file mode 100644 index 0000000000..4a31fefcee --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-addpcis.s @@ -0,0 +1,15 @@ + +.global main +.type main,function +# addpcis: the sum of NIA + ( D || 0x0000) is placed in RT. +main: + subpcis 3,+0x100 # /* set r3 */ + subpcis 4,+0x10 # /* set r4 */ + subpcis 5,+0x1 # /* set r5 */ + lnia 6 # /* set r6 */ + addpcis 7,+0x1 # /* set r7 */ + addpcis 8,+0x10 # /* set r8 */ + addpcis 9,+0x100 # /* set r9 */ + blr + + diff --git a/gdb/testsuite/gdb.arch/powerpc-lnia.exp b/gdb/testsuite/gdb.arch/powerpc-lnia.exp new file mode 100644 index 0000000000..2348824feb --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-lnia.exp @@ -0,0 +1,108 @@ +# Copyright 2021 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# Test to see if gdb is properly single stepping over the +# displaced lnia instruction. +# lnia is an extended mnemonic for the addpcis instruction, which +# stores the $NIA plus an immediate value into a register. +# +# lnia Rx == addpcis Rx,0 == lnia Rx +# subcis Rx,value == addpcis Rx,-value + +if { ![istarget powerpc*-*] } { + verbose "Skipping powerpc lnia test." + return +} + +#exp_internal 1 +set retval 0 + +set testfile "powerpc-lnia" +set srcfile ${testfile}.s +set binfile [standard_output_file ${testfile}] + +if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {}] != "" } { + untested "PowerPC lnia test" + return -1 +} + +gdb_exit +gdb_start +gdb_load ${binfile} + +if ![runto_main] then { + return +} + +set before_pc 0 +set check_pc [get_hexadecimal_valueof "\$pc" "default0"] + +# set some breakpoints on the instructions below main(). +set bp1 *$check_pc+4 +set bp2 *$check_pc+12 +set bp3 *$check_pc+16 +gdb_breakpoint $bp1 +gdb_breakpoint $bp2 +gdb_breakpoint $bp3 + +# single-step through the lnia instructions, and retrieve the +# register values as we proceed. +gdb_test "stepi" "" "set r3" +set check_r3 [get_hexadecimal_valueof "\$r3" "default0"] +gdb_test "stepi" "" "set r4" +set check_r4 [get_hexadecimal_valueof "\$r4" "default0"] +gdb_test "stepi" "" "set r5" +set check_r5 [get_hexadecimal_valueof "\$r5" "default0"] +gdb_test "stepi" "" "set r6" +set check_r6 [get_hexadecimal_valueof "\$r6" "default0"] +gdb_test "stepi" "" "set r7" +set check_r7 [get_hexadecimal_valueof "\$r7" "default0"] +gdb_test "stepi" "" "set r8" +set check_r8 [get_hexadecimal_valueof "\$r8" "default0"] +gdb_test "stepi" "" "set r9" +set check_r9 [get_hexadecimal_valueof "\$r9" "default0"] + +# Ensure that our register values are ascending. +# before the displaced single-stepping fix, the values from +# the displaced instructions were out of order. +# After the fix, the values below should be entirely +# in order, even if we have executed the instruction from +# a displaced location. +if [expr $check_r3 + 4 != $check_r4] { + fail "unexpected value r3+4 != r4 , r3: $check_r3 r4: $check_r4 " +} +if [expr $check_r4 + 4 != $check_r5] { + fail "unexpected value r4+4 != r5 , r4: $check_r4 r5: $check_r5 " +} +if [expr $check_r5 + 4 != $check_r6] { + fail "unexpected value r5+4 != r6 , r5: $check_r5 r6: $check_r6 " +} +if [expr $check_r6 + 4 != $check_r7] { + fail "unexpected value r6+4 != r7 , r6: $check_r6 r7: $check_r7 " +} +if [expr $check_r7 + 4 != $check_r8] { + fail "unexpected value r7+4 != r8 , r7: $check_r7 r8: $check_r8 " +} +if [expr $check_r8 + 4 != $check_r9] { + fail "unexpected value r8+4 != r9 , r8: $check_r8 r9: $check_r9 " +} + +gdb_test "info break" +gdb_test "info register r3 r4 r5 r6 r7 r8 r9" +gdb_test "disas main" + +# Let the inferior store all vector registers in a buffer, then dump +# the buffer and check it. + diff --git a/gdb/testsuite/gdb.arch/powerpc-lnia.s b/gdb/testsuite/gdb.arch/powerpc-lnia.s new file mode 100644 index 0000000000..6945140428 --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-lnia.s @@ -0,0 +1,14 @@ + +.global main +.type main,function +main: + lnia 3 # /* set r3 */ + lnia 4 # /* set r4 */ + lnia 5 # /* set r5 */ + lnia 6 # /* set r6 */ + lnia 7 # /* set r7 */ + lnia 8 # /* set r8 */ + lnia 9 # /* set r9 */ + blr + +