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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2023 08:59:57.3586 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4cff07da-0492-4d8d-dcd8-08db0432b15c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT007.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB8381 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 1/30/23 04:45, Thiago Jung Bauermann wrote: > It will be used in a subsequent commit. There's no functional change. > > Reviewed-by: Luis Machado > Approved-By: Simon Marchi > --- > gdbserver/linux-aarch64-low.cc | 36 ++++++++++++++++++++++------------ > 1 file changed, 24 insertions(+), 12 deletions(-) > > diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc > index 2ed6e95562c5..92c621e5548c 100644 > --- a/gdbserver/linux-aarch64-low.cc > +++ b/gdbserver/linux-aarch64-low.cc > @@ -675,6 +675,28 @@ aarch64_target::low_delete_process (arch_process_info *info) > xfree (info); > } > > +/* Matches HWCAP_PACA in kernel header arch/arm64/include/uapi/asm/hwcap.h. */ > +#define AARCH64_HWCAP_PACA (1 << 30) > + > +/* Obtain the architectural features available in the given THREAD. */ > + > +static struct aarch64_features > +aarch64_get_arch_features (const thread_info *thread) > +{ > + struct aarch64_features features; > + int pid = thread->id.pid (); > + int tid = thread->id.lwp (); > + > + features.vq = aarch64_sve_get_vq (tid); > + /* A-profile PAC is 64-bit only. */ > + features.pauth = linux_get_hwcap (pid, 8) & AARCH64_HWCAP_PACA; > + /* A-profile MTE is 64-bit only. */ > + features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE; > + features.tls = aarch64_tls_register_count (tid); > + > + return features; > +} > + > void > aarch64_target::low_new_thread (lwp_info *lwp) > { > @@ -827,9 +849,6 @@ aarch64_adjust_register_sets (const struct aarch64_features &features) > } > } > > -/* Matches HWCAP_PACA in kernel header arch/arm64/include/uapi/asm/hwcap.h. */ > -#define AARCH64_HWCAP_PACA (1 << 30) > - > /* Implementation of linux target ops method "low_arch_setup". */ > > void > @@ -845,15 +864,8 @@ aarch64_target::low_arch_setup () > > if (is_elf64) > { > - struct aarch64_features features; > - int pid = current_thread->id.pid (); > - > - features.vq = aarch64_sve_get_vq (tid); > - /* A-profile PAC is 64-bit only. */ > - features.pauth = linux_get_hwcap (pid, 8) & AARCH64_HWCAP_PACA; > - /* A-profile MTE is 64-bit only. */ > - features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE; > - features.tls = aarch64_tls_register_count (tid); > + struct aarch64_features features > + = aarch64_get_arch_features (current_thread); > > current_process ()->tdesc = aarch64_linux_read_description (features); > Still LGTM.