From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 5923A39F7B11 for ; Thu, 20 Oct 2022 09:35:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5923A39F7B11 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 9F056300089; Thu, 20 Oct 2022 09:35:10 +0000 (UTC) From: Tsukasa OI To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Cc: gdb-patches@sourceware.org Subject: [PATCH 13/40] sim/frv: Initialize some variables Date: Thu, 20 Oct 2022 09:32:18 +0000 Message-Id: <51a03f7097921cc48954210cf99e370ae8982ec8.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Oct 2022 09:35:14 -0000 This commit is strongly related to "cpu/frv: Initialize some variables" and applies corresponding changes to sim/frv/sem.c. Note: This commit touches CGEN-generated files directly. Modifying cpu/frv.cpu (which is done) and regenerating with CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/frv/sem.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sim/frv/sem.c b/sim/frv/sem.c index cc7cbeee318..28610f4eac7 100644 --- a/sim/frv/sem.c +++ b/sim/frv/sem.c @@ -3054,6 +3054,7 @@ SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { QI tmp_cc; + tmp_cc = 0; if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) { tmp_cc = ANDQI (tmp_cc, 7); } else { @@ -4545,6 +4546,7 @@ SEM_FN_NAME (frvbf,lddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); @@ -4591,6 +4593,7 @@ SEM_FN_NAME (frvbf,nlddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (tmp_do_op) { { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); @@ -6706,6 +6709,7 @@ SEM_FN_NAME (frvbf,clddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); -- 2.34.1