From: Luis Machado <luis.machado@arm.com>
To: Tomas Vanek <vanekt@fbl.cz>, gdb-patches@sourceware.org
Subject: Re: [RFC PATCH 2/5] gdb/arm: PR 29716 Fix FNC_RETURN stack selection in exception unwinder
Date: Fri, 11 Nov 2022 09:23:56 +0000 [thread overview]
Message-ID: <538abc71-3961-8486-08e0-5d1fdfd6c862@arm.com> (raw)
In-Reply-To: <1667641476-31602-2-git-send-email-vanekt@fbl.cz>
Hi Tomas,
I'd like to address the performance regression first before we get to these additional improvements.
I've been discussing PR 29738 with Torbjörn and have provided some feedback.
On 11/5/22 09:44, Tomas Vanek wrote:
> Unwinding of FNC_RETURN selected the process stack whenever zero IPSR
> indicated thread mode.
>
> This does not comply
> Arm v8-M Architecture Reference Manual
> B3.8 Stack pointer
> IDMLS "In Thread mode, CONTROL.SPSEL determines whether the PE uses
> the main or process stack"
>
> Check SPSEL bit of CONTROL_S register.
>
> For simplicity the CONTROL_S is not tracked for changes
> in the inner frames, the CONTROL_S value is passed unchanged from
> the innermost frame.
>
> Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
> ---
> gdb/arm-tdep.c | 28 +++++++++++++++++++++-------
> 1 file changed, 21 insertions(+), 7 deletions(-)
>
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index 564ee43..4180277 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -3485,13 +3485,27 @@ struct frame_unwind arm_stub_unwind = {
> return cache;
> }
>
> - ULONGEST xpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM);
> - if ((xpsr & 0x1ff) != 0)
> - /* Handler mode: This is the mode that exceptions are handled in. */
> - arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_msp_s_regnum);
> - else
> - /* Thread mode: This is the normal mode that programs run in. */
> - arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_psp_s_regnum);
> + bool spsel = true;
> + if (tdep->m_profile_control_s_regnum >= 0)
> + {
> + ULONGEST control_s
> + = get_frame_register_unsigned (this_frame,
> + tdep->m_profile_control_s_regnum);
> + spsel = (control_s & (1 << 1)) != 0;
> + }
> +
> + bool s_process_stack = false;
> + if (spsel)
> + {
> + ULONGEST xpsr = get_frame_register_unsigned (this_frame,
> + ARM_PS_REGNUM);
> + s_process_stack = (xpsr & 0x1ff) == 0;
> + }
> +
> + arm_cache_switch_prev_sp (cache, tdep,
> + s_process_stack ?
> + tdep->m_profile_psp_s_regnum :
> + tdep->m_profile_msp_s_regnum);
>
> CORE_ADDR unwound_sp = arm_cache_get_prev_sp_value (cache, tdep);
>
next prev parent reply other threads:[~2022-11-11 9:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-05 9:44 [RFC PATCH 1/5] gdb/arm: Introduce control_s and control_ns registers Tomas Vanek
2022-11-05 9:44 ` [RFC PATCH 2/5] gdb/arm: PR 29716 Fix FNC_RETURN stack selection in exception unwinder Tomas Vanek
2022-11-11 9:23 ` Luis Machado [this message]
2022-11-05 9:44 ` [RFC PATCH 3/5] gdb/dwarf2: Add dwarf2_frame_reg_rule for GDB register number Tomas Vanek
2022-11-05 9:44 ` [RFC PATCH 4/5] gdb/arm: Unwinding of secure procedure with cmse_nonsecure_entry attribute Tomas Vanek
2022-11-05 9:44 ` [RFC PATCH 5/5] HACK frame inner than comparison for Arm M-profile sec ext Tomas Vanek
2022-11-08 11:23 ` [RFC PATCH 1/5] gdb/arm: Introduce control_s and control_ns registers Luis Machado
2022-11-08 15:52 ` Tomas Vanek
2022-11-08 15:58 ` Tomas Vanek
2022-11-09 15:27 ` Luis Machado
2022-11-08 16:48 ` Torbjorn SVENSSON
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