From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31744 invoked by alias); 23 Sep 2014 12:45:28 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 31734 invoked by uid 89); 23 Sep 2014 12:45:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 23 Sep 2014 12:45:26 +0000 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s8NCjM5K006105 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 23 Sep 2014 08:45:23 -0400 Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s8NCjKJZ005616; Tue, 23 Sep 2014 08:45:21 -0400 Message-ID: <54216B60.3050409@redhat.com> Date: Tue, 23 Sep 2014 12:45:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.0 MIME-Version: 1.0 To: Yao Qi , Pedro Alves CC: Jon Burgess , gdb-patches@sourceware.org Subject: Re: [RFC][PATCH] arm-tdep.c (arm_m_exception_cache): Handle stack switching to PSP during exception unwind. References: <1411253227.22117.27.camel@shark.nightingale.homedns.org> <8761geykjg.fsf@codesourcery.com> <54213171.1010703@redhat.com> <87wq8uwmp1.fsf@codesourcery.com> In-Reply-To: <87wq8uwmp1.fsf@codesourcery.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2014-09/txt/msg00683.txt.bz2 On 09/23/2014 01:22 PM, Yao Qi wrote: > Pedro Alves writes: > >> Let's start by fixing this properly, please. If GDB needs to know >> about these registers, then they should be part of a known feature >> in the target description. According to B1.4 in the same document, >> we see: >> >> "The ARMv7-M profile has the following registers closely coupled to the core: >> >> - general purpose registers R0-R12 >> - 2 Stack Pointer registers, SP_main and SP_process (banked versions of R13) >> - the Link Register, LR (R14) >> - the Program Counter, PC >> - status registers for flags, exception/interrupt level, and execution state bits >> - mask registers associated with managing the prioritization scheme >> for exceptions and interrupts >> - a control register (CONTROL) to identify the current stack and >> thread mode privilege level. >> " >> >> Seems like even more core things other than SP_main/SP_process are >> missing from org.gnu.gdb.arm.m-profile, when debugging at this level. >> > > If we add more registers to feature org.gnu.gdb.arm.m-profile, xml files > provided by gdb stubs (such as openocd) have to be updated too, > otherwise GDB will reject the target description, right? Does this > cause any compatibility issue? new gdb rejects the target description > from old openocd. Right, just making GDB expect more registers in the existing feature would be a problem for compatibility. So we don't add new registers to existing features. Instead we either: - create a replacement feature for "org.gnu.gdb.arm.m-profile" with the full set of core registers. - or create a separate feature for the missing registers, and have the reported target description include both the "org.gnu.gdb.arm.m-profile" feature and the new feature. I'm guessing org.gnu.gdb.arm.m-profile doesn't include those exception/interrupt related registers as these aren't available to userspace programs (*) ? Do non-M-profile ARMs have them too? (*) BTW, if so, what does ARM call the mode that allows access to these registers? "kernel mode", or something else? Thanks, Pedro Alves