Re: [PATCH] MIPS: Handle the DSP registers for bare metal

[Pedro Alves <palves@redhat.com>]

On 12/30/2014 01:15 AM, Maciej W. Rozycki wrote:
> On Fri, 19 Dec 2014, Pedro Alves wrote:
> 
>>>> > >> Took me a bit to grok this, but this is adding slack for ACXn, right?
>>> > > 
>>> > > Sorry, what do you mean by "slack" here?  Is it "gap" or something else?
>> > 
>> > Yes, "gap".
>> > 
>>> > > The offsets of DSP registers are different on linux and bare metal, so
>>> > > this patch gives the correct offset or layout to them.
>> > 
>> > The proper solution for this issue is to decouple GDB's internal
>> > register numbers from the target's g/G packet layout, which is exactly
>> > what happens when you have a description -- GDB uses the offsets found
>> > in the target description.  And you're touching code that is parsing a
>> > description, so the real issue should be in the target description.
>  I'm not sure offhand whether the piece of patch proposed you refer to 
> here is correct or not, but the overall scope of this and the other patch 
> Yao has mentioned yet outstanding is support for legacy bare-metal RSP 
> stubs that have no notion of target descriptions and may even predate 
> GDB's support for these descriptions, and yet they want to make all 
> processor registers available for inspection and modification by GDB.  
> This code comes from MIPS UK and dates back to early 2000s and I think it 
> would be good having it upstream so that standard GDB can talk to these 
> stubs.  The fixed layout of the g/G packet and corresponding p/P packet 
> offsets have been set by the bare-metal SDE toolchain years ago.

The way to handle that is still through target descriptions -- if a
target doesn't send a target description, GDB maps known layouts to built-in
target descriptions.  See mips_register_g_packet_guesses.

[snip interesting background info]

Thanks for all that.

-- 
Pedro Alves