From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 128441 invoked by alias); 3 Oct 2018 14:30:43 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 128286 invoked by uid 89); 3 Oct 2018 14:30:27 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-11.4 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.2 spammy= X-HELO: prv1-mh.provo.novell.com Received: from prv1-mh.provo.novell.com (HELO prv1-mh.provo.novell.com) (137.65.248.33) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 03 Oct 2018 14:30:24 +0000 Received: from INET-PRV1-MTA by prv1-mh.provo.novell.com with Novell_GroupWise; Wed, 03 Oct 2018 08:30:18 -0600 Message-Id: <5BB4D278020000780013F4F4@prv1-mh.provo.novell.com> Date: Wed, 03 Oct 2018 14:30:00 -0000 From: "Jan Beulich" To: , Cc: ,, Subject: Re: [PATCH] x86-64: fix ZMM register state tracking References: <5B8FD8B302000078001E5940@prv1-mh.provo.novell.com> <369f9b84-77e3-3fa4-f363-a89ee503cff4@ericsson.com> <5B960E3D020000780013C85E@prv1-mh.provo.novell.com> <5BA0FFB102000078001E97B0@prv1-mh.provo.novell.com> <0e0d9f23-2cbf-eb5a-64fa-6cda3392053a@ericsson.com> <5BAA4E7302000078001EBC73@prv1-mh.provo.novell.com> <580ba4ea-93ae-ffd0-7bce-bd1f75cf9ff9@ericsson.com> In-Reply-To: <580ba4ea-93ae-ffd0-7bce-bd1f75cf9ff9@ericsson.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-SW-Source: 2018-10/txt/msg00066.txt.bz2 >>> Simon Marchi 10/02/18 9:20 PM >>> >On 2018-09-25 11:04 AM, Jan Beulich wrote: >>>>> On 25.09.18 at 05:28, wrote: >>> On 2018-09-18 09:37 AM, Jan Beulich wrote: >>> Thanks for the instructions. There is already a test covering AVX512 >>> instructions, so I figured I would add it there. However, I don't >>> have a processor that supports AVX512, so I'm unable to run the test. >>> >>> Here's a patch, can you try to confirm that the test fails without the >>> fix and passes with the fix? I probably screwed up somewhere, but it >>> should be pretty close. >>=20 >> There are two issues here: First of all, unrelated to this patch, the >> construct around line 95 in i386-avx512.exp should look like >>=20 >> if [is_amd64_regs_target] { >> set nr_regs 32 >> } else { >> set nr_regs 8 >> } >>=20 >> Of course this also affects other tests in here, but without this correc= tion >> the loop you add does nothing at all. > >Thanks, this has now been fixed in master. Ah, good to know. >Here's the revised version with this fixed. I am not sure about the output >for zmm0 though. I'll give this a go and adjust if need be, but it'll likely take me a coupl= e of days to get to it. I take it that ... >--- a/gdb/testsuite/gdb.arch/i386-avx512.c >+++ b/gdb/testsuite/gdb.arch/i386-avx512.c >@@ -249,6 +249,13 @@ main (int argc, char **argv) >move back to array and check values. */ >move_zmm_data_to_memory (); >asm ("nop"); /* sixth breakpoint here */ >+ >+ asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm0"); >+#ifdef __x86_64__s ... the trailing s here simply is a typo. Jan