From: Stafford Horne <shorne@gmail.com>
To: GDB patches <gdb-patches@sourceware.org>
Cc: Openrisc <openrisc@lists.librecores.org>,
Mike Frysinger <vapier@gentoo.org>,
Peter Gavin <pgavin@gmail.com>
Subject: [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
Date: Mon, 29 May 2017 14:47:00 -0000 [thread overview]
Message-ID: <643da7dcb7d9913a1b239f3aae0ebaebb85a00d7.1496066478.git.shorne@gmail.com> (raw)
In-Reply-To: <cover.1496066478.git.shorne@gmail.com>
In-Reply-To: <cover.1496066478.git.shorne@gmail.com>
From: Peter Gavin <pgavin@gmail.com>
* sim/common/ChangeLog:
2016-05-21 Peter Gavin <pgavin@gmail.com>
Stafford Horne <shorne@gmail.com>
* cgen-accfp.c (remsf, remdf): New function.
(cgen_init_accurate_fpu): Add remsf and remdf.
* cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf.
* sim-fpu.c (sim_fpu_rem): New function.
* sim-fpu.h (sim_fpu_status_invalid_irx): New enum.
(sim_fpu_rem): New function.
---
sim/common/cgen-accfp.c | 40 +++++++++++++++++++++++++++++++
sim/common/cgen-fpu.h | 4 ++++
sim/common/sim-fpu.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++++
sim/common/sim-fpu.h | 3 +++
4 files changed, 110 insertions(+)
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c
index afbca6d..d7124fe 100644
--- a/sim/common/cgen-accfp.c
+++ b/sim/common/cgen-accfp.c
@@ -93,6 +93,25 @@ divsf (CGEN_FPU* fpu, SF x, SF y)
}
static SF
+remsf (CGEN_FPU* fpu, SF x, SF y)
+{
+ sim_fpu op1;
+ sim_fpu op2;
+ sim_fpu ans;
+ unsigned32 res;
+ sim_fpu_status status;
+
+ sim_fpu_32to (&op1, x);
+ sim_fpu_32to (&op2, y);
+ status = sim_fpu_rem (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
+ sim_fpu_to32 (&res, &ans);
+
+ return res;
+}
+
+static SF
negsf (CGEN_FPU* fpu, SF x)
{
sim_fpu op1;
@@ -452,6 +471,25 @@ divdf (CGEN_FPU* fpu, DF x, DF y)
return res;
}
+static SF
+remdf (CGEN_FPU* fpu, DF x, DF y)
+{
+ sim_fpu op1;
+ sim_fpu op2;
+ sim_fpu ans;
+ unsigned64 res;
+ sim_fpu_status status;
+
+ sim_fpu_64to (&op1, x);
+ sim_fpu_64to (&op2, y);
+ status = sim_fpu_rem (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
+ sim_fpu_to64(&res, &ans);
+
+ return res;
+}
+
static DF
negdf (CGEN_FPU* fpu, DF x)
{
@@ -664,6 +702,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
o->subsf = subsf;
o->mulsf = mulsf;
o->divsf = divsf;
+ o->remsf = remsf;
o->negsf = negsf;
o->abssf = abssf;
o->sqrtsf = sqrtsf;
@@ -682,6 +721,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
o->subdf = subdf;
o->muldf = muldf;
o->divdf = divdf;
+ o->remdf = remdf;
o->negdf = negdf;
o->absdf = absdf;
o->sqrtdf = sqrtdf;
diff --git a/sim/common/cgen-fpu.h b/sim/common/cgen-fpu.h
index 134b4d0..5f9b55d 100644
--- a/sim/common/cgen-fpu.h
+++ b/sim/common/cgen-fpu.h
@@ -69,6 +69,7 @@ struct cgen_fp_ops {
SF (*subsf) (CGEN_FPU*, SF, SF);
SF (*mulsf) (CGEN_FPU*, SF, SF);
SF (*divsf) (CGEN_FPU*, SF, SF);
+ SF (*remsf) (CGEN_FPU*, SF, SF);
SF (*negsf) (CGEN_FPU*, SF);
SF (*abssf) (CGEN_FPU*, SF);
SF (*sqrtsf) (CGEN_FPU*, SF);
@@ -93,6 +94,7 @@ struct cgen_fp_ops {
DF (*subdf) (CGEN_FPU*, DF, DF);
DF (*muldf) (CGEN_FPU*, DF, DF);
DF (*divdf) (CGEN_FPU*, DF, DF);
+ DF (*remdf) (CGEN_FPU*, DF, DF);
DF (*negdf) (CGEN_FPU*, DF);
DF (*absdf) (CGEN_FPU*, DF);
DF (*sqrtdf) (CGEN_FPU*, DF);
@@ -142,6 +144,7 @@ struct cgen_fp_ops {
XF (*subxf) (CGEN_FPU*, XF, XF);
XF (*mulxf) (CGEN_FPU*, XF, XF);
XF (*divxf) (CGEN_FPU*, XF, XF);
+ XF (*remxf) (CGEN_FPU*, XF, XF);
XF (*negxf) (CGEN_FPU*, XF);
XF (*absxf) (CGEN_FPU*, XF);
XF (*sqrtxf) (CGEN_FPU*, XF);
@@ -180,6 +183,7 @@ struct cgen_fp_ops {
TF (*subtf) (CGEN_FPU*, TF, TF);
TF (*multf) (CGEN_FPU*, TF, TF);
TF (*divtf) (CGEN_FPU*, TF, TF);
+ TF (*remtf) (CGEN_FPU*, TF, TF);
TF (*negtf) (CGEN_FPU*, TF);
TF (*abstf) (CGEN_FPU*, TF);
TF (*sqrttf) (CGEN_FPU*, TF);
diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c
index 0d4d08a..1a79e71 100644
--- a/sim/common/sim-fpu.c
+++ b/sim/common/sim-fpu.c
@@ -41,6 +41,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-io.h"
#include "sim-assert.h"
+#include <math.h> /* for drem, remove when soft-float version is implemented */
/* Debugging support.
If digits is -1, then print all digits. */
@@ -1551,6 +1552,68 @@ sim_fpu_div (sim_fpu *f,
INLINE_SIM_FPU (int)
+sim_fpu_rem (sim_fpu *f,
+ const sim_fpu *l,
+ const sim_fpu *r)
+{
+ if (sim_fpu_is_snan (l))
+ {
+ *f = *l;
+ f->class = sim_fpu_class_qnan;
+ return sim_fpu_status_invalid_snan;
+ }
+ if (sim_fpu_is_snan (r))
+ {
+ *f = *r;
+ f->class = sim_fpu_class_qnan;
+ return sim_fpu_status_invalid_snan;
+ }
+ if (sim_fpu_is_qnan (l))
+ {
+ *f = *l;
+ f->class = sim_fpu_class_qnan;
+ return 0;
+ }
+ if (sim_fpu_is_qnan (r))
+ {
+ *f = *r;
+ f->class = sim_fpu_class_qnan;
+ return 0;
+ }
+ if (sim_fpu_is_infinity (l))
+ {
+ *f = sim_fpu_qnan;
+ return sim_fpu_status_invalid_irx;
+ }
+ if (sim_fpu_is_zero (r))
+ {
+ *f = sim_fpu_qnan;
+ return sim_fpu_status_invalid_div0;
+ }
+ if (sim_fpu_is_zero (l))
+ {
+ *f = *l;
+ return 0;
+ }
+ if (sim_fpu_is_infinity (r))
+ {
+ *f = *l;
+ return 0;
+ }
+ {
+ /* TODO: Implement remainder here. */
+
+ sim_fpu_map lval, rval, fval;
+ lval.i = pack_fpu(l, 1);
+ rval.i = pack_fpu(r, 1);
+ fval.d = remainder(lval.d, rval.d);
+ unpack_fpu(f, fval.i, 1);
+ return 0;
+ }
+}
+
+
+INLINE_SIM_FPU (int)
sim_fpu_max (sim_fpu *f,
const sim_fpu *l,
const sim_fpu *r)
diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h
index d27d80a..c108f1f 100644
--- a/sim/common/sim-fpu.h
+++ b/sim/common/sim-fpu.h
@@ -151,6 +151,7 @@ typedef enum
sim_fpu_status_overflow = 4096,
sim_fpu_status_underflow = 8192,
sim_fpu_status_denorm = 16384,
+ sim_fpu_status_invalid_irx = 32768, /* (inf % X) */
} sim_fpu_status;
@@ -230,6 +231,8 @@ INLINE_SIM_FPU (int) sim_fpu_mul (sim_fpu *f,
const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_div (sim_fpu *f,
const sim_fpu *l, const sim_fpu *r);
+INLINE_SIM_FPU (int) sim_fpu_rem (sim_fpu *f,
+ const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_max (sim_fpu *f,
const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_min (sim_fpu *f,
--
2.9.4
next prev parent reply other threads:[~2017-05-29 14:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-29 14:47 [PATCH v4 0/5] sim port for OpenRISC Stafford Horne
2017-05-29 14:47 ` Stafford Horne [this message]
2017-08-31 21:11 ` [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) Simon Marchi
2017-08-31 22:33 ` Stafford Horne
2017-09-01 7:57 ` Simon Marchi
2017-09-01 8:29 ` Stafford Horne
2017-05-29 14:47 ` [PATCH v4 2/5] sim: cgen: add MUL2OFSI and MUL1OFSI macros (needed for OR1K l.mul[u]) Stafford Horne
2017-09-04 20:32 ` Simon Marchi
2017-09-04 21:05 ` Stafford Horne
2017-05-29 14:48 ` [PATCH v4 3/5] sim: or1k: add or1k target to sim Stafford Horne
2017-09-04 21:14 ` Simon Marchi
2017-09-04 21:49 ` Stafford Horne
2017-09-05 18:53 ` Simon Marchi
2017-05-29 14:49 ` [PATCH v4 5/5] sim: testsuite: add testsuite for or1k sim Stafford Horne
2017-06-13 10:15 ` [PATCH v4 0/5] sim port for OpenRISC Stafford Horne
2017-08-10 13:22 ` Stafford Horne
2017-08-23 6:29 ` Stafford Horne
2017-08-31 19:57 ` Simon Marchi
2017-08-31 21:58 ` Stafford Horne
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